B17 - Separate compilation capability - extern module

From: Clifford E. Cummings (cliffc@europa.com)
Date: Fri May 02 1997 - 09:03:30 PDT


Subject: BTF - B17 - Separate compilation capability - extern module

Behavioral Task Force - Enhancement Request
Assigned Enhancement Request Number: B17
Enhancement Name (Description): Separate compilation capability - extern module
Date Submitted: 970320
Requestor: eli@interhdl.com (Eli Sternheim)
Status: RO
Is enhancement intended to be synthesizable?:

1, A prototype capability. This will enable separate compilation. For
example:

extern module m(input [3:0] i, output o);
//********************************************************************//
// Cliff Cummings E-mail: cliffc@europa.com //
// Sunburst Design Phone: 503-579-6362 / FAX: 503-579-7631 //
// 15870 SW Breccia Dr., Beaverton, OR 97007 //
// //
// Verilog & Synthesis Training / On-Site Training //
// Verilog, VHDL, Synopsys, LMG, FPGA, Consulting and Contracting //
//********************************************************************//



This archive was generated by hypermail 2.1.4 : Mon Jul 08 2002 - 12:54:40 PDT and
sponsored by Boyd Technology, Inc.