BTF - B21 - Automatic initialization of integers to 0

From: Clifford E. Cummings (cliffc@europa.com)
Date: Fri May 02 1997 - 09:01:27 PDT


I would oppose this request. I believe "BTF - B14 - Initial assignments in
register" would adequately cover this request.

I have test code that declares counters (integers) that check for
integer==='bx, and if true, sets integer = 1 to initialize the counters. It
would be a minor modification to some of my code if this enhancement was
implemented, but again, I believe it is reasonable to assume that unassigned
reg-types are "x" upon initialization, and I believe BTF - B14 would allow
an alternate method to initialize integers to 0.

Regards - Cliff Cummings

Subject: BTF - B21 - Automatic initialization of integers to 0

Behavioral Task Force - Enhancement Request
Assigned Enhancement Request Number: B21
Enhancement Name (Description): Automatic initialization of integers to 0
Date Submitted: 970418
Requestor: adamk@cyrix.com (Adam Krolnik)

Status: RO
Is enhancement intended to be synthesizable?:

13. Integer declarations are currently just a synonym for "reg[31:0]". How
about making them look a little more like integers? Have a legal integer
value; start at 0, not 'bx.

From: "Sutherland" <stuart@sutherland.com>
Date: Tue, 29 Apr 1997 16:39:44 -0700

And integer is NOT the same as a reg [31:0]. Page 24 of the LRM states that
an integer is a signed variable (reg is unsigned). Page 25 states that an
integer is "at least" 32 bits, but it may be larger. Page 32 shows (rather
poorly) how arithmetic operations using integer and reg variables behave
very differently.

I can't find it, but I thought the LRM also documented that a range could be
specified with an integer declaration, but the range could be ignored by
software tools (a long-time Verilog-XL "feature" permitted declarations such
as "integer [0:15] i;", but Verilog-XL still simulated the variable as
[31:0] -- I don't know if that "feature" is still in XL).
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