From: Clifford E. Cummings (cliffc@europa.com)
Date: Fri May 02 1997 - 08:22:59 PDT
I could support this request.
I always find it amusing to run the following code through Synopsys, only to
find 32 tri-state drivers and 32 and gates with one input tied low.
module driver (y, a, en);
output [63:0] y;
input [63:0] a;
input en;
assign y = en ? a : 'bz;
endmodule
Note: This could potentially break exiting models if anyone has been
counting on zero-extension for busses greater that 32 bits wide, but it
seems like an extremely risky strategy to intentionally employ that coding
style.
Regards - Cliff Cummings
Subject: BTF - B11 - Automatic width extension beyond 32 bits
Behavioral Task Force - Enhancement Request
Assigned Enhancement Request Number: B11
Enhancement Name (Description): Automatic width extension beyond 32 bits
Date Submitted: 970319
Requestor: adamk@cyrix.com (Adam Krolnik)
Status: RO
Is enhancement intended to be synthesizable?:
3. Width extension.
If you want to size a constant you need to specify a width to it. E.g. 7'h2
If you don't specify a size ('h123) it has a machine word width (I.e. 32
bits.) This causes the following statements to provide unexpected behavior:
reg[63:0] a;
initial a = 'h0;
reg[63:0] b;
initial b = 'bz;
Rather, the unsized constant should be extended (signed?, zero?, last-bit?)
to the width of the lhs. In the example, 'a' should have the value 64'h0,
not {32'bx, 32'b0}.
From: mac@silicon-sorcery.com
Date: Wed, 19 Mar 97 14:22:50 PST
Not unreasonable; the current behavior is not really serving
any useful purpose, except to confuse newbies.
I would support this proposal. one would need to consider the
size of unsized constants in expression context:
wire [24:0] a, b;
assign a = (b + 'h23)>>2;
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