From: Vivek Sagdeo (vivek@professionals.com)
Date: Tue May 20 1997 - 08:27:09 PDT
mac (Mike Mcnamara) writes :
>> Vivek Sagdeo
>> 5. parameter passing of structures - ........
> Vivek - please use the word argument, parameter means something else
> in Verilog
No arguments with that - please read the section 5 of the spec
on structures as "passing structures as arguments".
-- vivek
<p> Vivek Sagdeo
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