From: Clifford E. Cummings (cliffc@europa.com)
Date: Thu Jun 05 1997 - 09:58:16 PDT
Req Enhancement Name (Description) Submitted Requestor Stat
B1 Verilog Generate 960227 IVC96 S1
B2 Multidimensional Arrays 960227 IVC96 S1
B3 Enhance Verilog File I/O 960227 IVC96 S1
B4 Re-entrant Tasks 960227 IVC96 S1
B5 Verilog Configuration Capability 960227 IVC96 S1
B6 Explicit parameter passing by name 970218 Kurt Baty P
B7 Comma separated sensitivity list 970218 Cliff Cummings P
B8 Combinational sensitivity list @* 970218 Mike McNamara S
B9 ANSI declarations 970319 Adam Krolnik S
B10 Behavioral assignment to wire 970319 Adam Krolnik S
B11 Automatic width ext beyond 32 bits 970319 Adam Krolnik S
B12 Continuous assignment case expressions 970319 Adam Krolnik S
B13 Mutable bit selects 970319 Adam Krolnik X
B14 Reg declaration initial assignments 970319 Adam Krolnik S
B15 Built-in sizeof(x) function 970319 Adam Krolnik S
B16 Access to last specified bit 970319 Adam Krolnik S
B17 Separate comp capability - extern mod 970320 Eli Sternheim S
B18 Enumerated types 970320 Eli Sternheim S
B19 Cadence signed arithmetic proposal 970409 Tom Fitzpatrick S
B20 Pullup/pulldown optional X-drive time 970428 Austen Hypher S
B21 Automatic init of integers to 0 970418 Adam Krolnik S
B22 Define an algorithm for $random() 970418 Adam Krolnik S
B23 Constant functions 970501 Kurt Baty S
B24 Add `ifndef conditional compilation 970505 Tom Fitzpatrick P
B25 Add struct / record data types 970514 Vivek Sagdeo S
<p> Status Key
S Submitted (priority not yet assigned)
S1 Submitted #1 Priority by BTF
S2 Submitted #2 Priority by BTF
S3 Submitted #3 Priority by BTF
S4 Submitted #4 Priority by BTF
P Passed by the BTF (VSG proposal TBD)
X Rejected by the BTF
VSG Proposal submitted to the VSG
A VSG Approved
R VSG Rejected
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