From: Anders Nordstrom (andersn@nortel.ca)
Date: Tue Sep 16 1997 - 11:26:16 PDT
Behavioral Task Force - Errata Submission
Assigned Enhancement Request Number: BE47
Errata Name (Description): Operand changes clarification
Section: 6.1.3 page 53
Date Submitted: 12/6/96
Requestor: Thomas Fitzpatrick
Status: Submitted (priority not yet assigned)
Errors found in the Verilog LRM (IEEE 1364-1995).
Details:
The last paragraph needs to be clarified. It currently reads:
"In situations where a right-hand side operand changes before a previous
change has had time to propagate to the left-hand side, then the latest value
change shall be the only one to be applied." It should state that: "The
latest value change is the change in the RHS at time T, and thus the
transition in c at time T+5 has no effect on a." Suggest adding the following
example:
Given the continuous assignment:
assign #10 a = b | c;
Assume that b and c are initially 1'b0. At time T, b changes to 1'b1, which
schedules a to become 1'b1 at time T+10. If, at time T+5, c also changes to
1'b1, a <- 1'b1 at time T+10.
Notes: Related to BE62
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| Anders Nordstrom |
| Senior ASIC Designer |
| |
| Northern Telecom Ltd. Email: andersn@nortel.ca |
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