From: Anders Nordstrom (andersn@nortel.ca)
Date: Sat Oct 11 1997 - 16:03:57 PDT
Behavioral Task Force - Errata Submission
Assigned Errata Number: BE66
Errata Name (Description): Signed and unsigned
Section:
Date Submitted: 970909
Requestor: J. Bhasker
Status: Submitted (priority not yet assigned)
Errors found in the Verilog LRM (IEEE 1364-1995).
Details:
Hi,
The Verilog LRM does not specify how the signedness of intermediate
results of expressions are to be handled.
What is "signed arith_op signed"?, "signed arith_op unsigned"?
Jim Vellenga and Ambar Sarkar from ViewLogic had posted the following
comment (when discussing signedness of relational ops):
++++++++++++++
>What appears to happen is that if the expression contains
>a vector value ("reg", "wire", or based integer), then the
>integers suddenly get treated as 32-bit vectors, and a
>"negation" of the integer value is treated as the unsigned
>32-bit value with the equivalent binary reputation. (Negation
>is done via two's-complement arithmetic).
++++++++++++++
Here is an example:
integer INTA, INTB, INTC;
reg [66:0] REGA, REGB, REGC;
initial begin
INTA = (2*32'h40000000)/2; // Stmt A
REGA = (2*32'h40000000)/2; //Stmt B
INTB = (4 - 6 ) * 3'd2; // Stmt C
REGB = (4 - 6 ) * 3'd2; // Stmt D
INTC = (4 - 6 ) * 3'd2 / 2; // Stmt E
REGC = (4 - 6 ) * 3'd2 / 2; // Stmt F
#10;
end
Consider Stmt A. Is the result of 2*32'h40000000 signed or unsigned?
Depending on which one, the final answer is different.
Is the result of (4-6) in Stmt C/D signed or sunsigned?
What about (4 - 6 ) * 3'd2 in Stmt E/F?
Here is what my simulator produces:
INTA=1073741824
INTB=-4
INTC=2147483646
REGA=(35 zeros)1(30zeros)
REGB=(64 ones)00
REGC=0(64 ones)0
Based on the results and Jim/Ambar's findings and the recent resolution
on relational operators, I conclude the following:
"signed arith_op signed" produces a signed number
"signed arith_op unsigned" causes the "signed" number to be interpreted
as a unsigned number and the result is unsigned.
In the above example,
2*32'h40000000 in Stmt A/B results in an unsigned value
(2 is first converted to a 32-bit unsigned quantity before mult).
4 - 6 in Stmt C/D results in a signed value.
(4 - 6 ) * 3'd2 in Stmt E/F is an unsigned quantity (the -2 result
of (4-6) is converted to a large positive unsigned number before
multiplication).
Is this conclusion reasonable or I am missing something?
- J. Bhasker, Lucent TEchnologies, jbhasker@lucent.com
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