From: Steve Meyer (sjmeyer@crl.com)
Date: Thu Mar 12 1998 - 10:13:15 PST
I propose changing parameter declaration statements to allow normal
reg range and signed declaration keywords. If feature has already been
proposed, just ignore this. Some examples (I am not sure if I am using latest
syntax):
parameter signed [3:0] mux_selector = 0;
paramater signed [0:3] mux_selector = 0; // only different if selects allowed
parameter real r1 = 3.5e17;
parameter p1 = 13'h7e;
parameter [31:0] dec_const = 1'b1; // valued converted to 32 bits
Notes:
1) For backward compatibility, parameter declarations without range or type
allowed using current width determined by right hand side expression
width still permitted.
2) Parameters declared with ranges can possibly be stored more efficiently.
Solves problem when constants are assigned initial (or # param
or defparam) values using small decimal constants.
3) Makes Verilog 98 compatibible with Verilog-AMS.
4) I think selects from parameters should be explicitly allowed by standard
following XL. In fact, every simulator needs to support selects from
parameters or else models in Thomas-Moorby book will not run
(i.e. dec_const[9] or dec_const[13:5]).
/Steve
-- Steve Meyer Phone: (415) 296-7017 Pragmatic C Software Corp. Fax: (415) 296-0946 220 Montgomery St., Suite 925 email: sjmeyer@crl.com San Francisco, CA 94104
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