From: Shalom Bresticker (shalom@msil.sps.mot.com)
Date: Wed May 20 1998 - 06:48:07 PDT
BAD MSG:
1. This proposal talks about "memories" and "multi-dimensional arrays" as though
hey were two different types of entities.
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I don't see any difference between them.
(Originally memories were limited to reg's, but this proposal removes that
limitation.)
The original Verilog called these memories because the original intention
was to enable modeling of memories, and the syntax allowed only two-dimensional
arrays, just enough to allow modeling of memories, but "memory" was never a
keyword of Verilog, as "reg" or "wire" is, just a term used to denote a two-
dimensional array.
I propose just calling them "arrays", without even the "multi-dimensional".
It is a simple and clear term.
The first paragraph of 3.8 should make clear that memories and connections of
generated instances are only examples of uses of arrays.
<p>2. The end of this proposal says that "Bit and part selects of multi-dimensional
arrays cannot be expressed because the elements are single bits.", whereas bit
selects and part selects of memories are allowed a few lines earlier.
This sounds like a mistake. First, I see no syntactic difference between memories
and multi-dimensional arrays.
Furthermore, B26 explicitly allows bit and part selects to arrays.
******************************************************************************
Shalom Bresticker email: shalom@msil.sps.mot.com
Motorola Semiconductor Israel, Ltd. Tel #: +972 9 9522268
P.O.B. 2208, Herzlia 46120, ISRAEL Fax #: +972 9 9522444
http://www.motorola-semi.co.il/
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<p>> Date: Tue, 19 May 1998 12:46:41 -0700
> From: Stefen Boyd <stefen@boyd.com>
> Subject: B02 and B26 draft
>
> I've taken a stab at B02 and B26. I expect there is some more
> polishing to do here...
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