From: Anders Nordstrom (Anders.Nordstrom.andersn@nt.com)
Date: Fri Sep 18 1998 - 08:47:33 PDT
BAD MSG:
Stefen,
ontent-Length: 5785
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Status: RO
Do you think you could take a look at two errata's BE71 and BE72?
If you have time, please write proposals and send to me and I will
distribute prior to the
next conference call.
If you don't have time to look at it now please let me know too.
Regards,
<p> Anders
<p><p><x-html><HTML>
<HEAD>
<TITLE> BE71 </TITLE>
</HEAD>
<BODY BGCOLOR="#FFFFFF">
<BR>
<HR SIZE=5 NOSHADE>
<H2> BE71 - Section 5.6.6 Port connections </H2>
<TABLE BORDER COLS=2 WIDTH="75%" >
<TR><TD>
Section: </TD><TD> 5.6.6
</TD></TR><TR><TD>
Date Submitted: </TD><TD> 980313
</TD></TR><TR><TD>
Requestor: </TD><TD> Adam Krolnik
</TD></TR><TR><TD>
Status: </TD><TD> Submitted
</TD></TR><TR><TD>
Analyzed by: </TD><TD> TBD
</TD></TR>
</TABLE>
<H3> Details </H3>
Section 5.6.6 "Port connections" describes the seldom seen syntax for specifying a port with separate internal and external names.
Why is this text in this section? Why is there no reference to 5.6.6 and this available
syntax in section 12.3?
I propose that this orphan port syntax description be moved to it's correct location (section 12.3). I.e. The Third paragraph should only read "Port connection rules are given in 12.3.7." <BR>
[And possibly should be joined to the first paragraph.]
Section 12.3 should include an example of a module with this specific syntax and an example
of it being instantiated.
<PRE>
Adam Krolnik
Verification Engineer
Cyrix - NSM.
Richardson TX. 75085
</PRE>
<HR SIZE=5 NOSHADE>
</BODY>
</HTML>
</x-html><x-html><HTML>
<HEAD>
<TITLE> BE72 </TITLE>
</HEAD>
<BODY BGCOLOR="#FFFFFF">
<BR>
<HR SIZE=5 NOSHADE>
<H2> BE72 - Section 5.5 Race conditions </H2>
<TABLE BORDER COLS=2 WIDTH="75%" >
<TR><TD>
Section: </TD><TD> 5.5
</TD></TR><TR><TD>
Date Submitted: </TD><TD> 970929
</TD></TR><TR><TD>
Requestor: </TD><TD> Daryl Stewart (Daryl.Stewart@cl.cam.ac.uk)
</TD></TR><TR><TD>
Status: </TD><TD> Submitted
</TD></TR><TR><TD>
Analyzed by: </TD><TD> TBD
</TD></TR>
</TABLE>
<H3> Details </H3>
<PRE>
module EXP_143;
reg q;
// comment out only one of the following two lines:
wire p; assign p=q;
// wire p=q;
initial begin
#1 $display("1st simulation cycle: q",q," p",p);
#0 $display("2nd simulation cycle: q",q," p",p);
end // initial #1
initial begin // this code based on that on p5-4, Oct P1364
q=1;
#1 q=0;
$display("1st: q",q," p",p);
#0 $display("2nd: q",q," p",p);
end // initial begin
initial begin
#1 $display("1st simulation cycle: q",q," p",p);
#0 $display("2nd simulation cycle: q",q," p",p);
end // initial begin
endmodule // EXP_143
With wire p=q; only commented out
$verilog -q experiment.143.cv
1st simulation cycle: q1 p1
1st: q0 p1
1st simulation cycle: q0 p1
2nd simulation cycle: q0 p1 (p is still 1)
2nd: q0 p0
2nd simulation cycle: q0 p0
</PRE>
The example code in section 5.5 "Race conditions" is at fault. <BR>
It states that the display immediately following the q=0 <BR>
assignment could show p as either 1 or 0. <BR>
This code shows that in fact, p does not become 0 until <BR>
partway through the 2nd simulation cycle in the same timestep, <BR>
hence it is impossible for the first display to see p=0. <BR>
This is because of the implicit #0 net delay. <BR>
<PRE>
With wire p; assign p=q; only commented out
$verilog -q experiment.143.cv
1st simulation cycle: q1 p1
1st: q0 p0
1st simulation cycle: q0 p0 (p is already 0)
2nd simulation cycle: q0 p0
2nd: q0 p0
2nd simulation cycle: q0 p0
</PRE>
Here, without the implicit #0 net delay, p becomes 0 <BR>
within the 1st simulation cycle.
<HR SIZE=5 NOSHADE>
</BODY>
</HTML>
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Sender: "Anders Nordstrom" <Anders.Nordstrom.andersn@nt.com>
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Date: Fri, 18 Sep 1998 11:53:18 -0400
From: "Anders Nordstrom" <Anders.Nordstrom.andersn@nt.com>
Reply-To: "Anders Nordstrom" <Anders.Nordstrom.andersn@nt.com>
Organization: Nortel
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To: kurt@argon.com, stefen@boyd.com, adamk@yrix.com,
Cliff Cummings <cliffc@sunburst-design.com>
Subject: BTF: B20 pull up proposal
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Status: RO
Guys,
We haven't discussed the proposal for changing the pullup model to allow
a time when it is X
in a while. Last time all vendors strongly opposed it. From a users
point of view I still think
it is a useful functionality to have. It may be implemented in another
way such as a new pullup
keyword to avoid to break legacy code or any other way.
Do you think it is worth continuing working on this one?
Regards,
Anders
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