From: Adam Krolnik (adamk@cyrix.com)
Date: Mon Oct 26 1998 - 00:53:57 PST
Here's the answers about errors/warnings with the different combinations
of port declarations (for XL and VCS)
One thing of interest, no errors/warnings generated from XL unless the module
is used...
Adam
<p>-------------------------------------------------------------------
Source first (using eperl -i)
<p>$port_list = ['', qw([15:8] [8:0]) ];
$port_decl = [qw([7:0] [15:8] [8:0])];
$wire_decl = [qw([7:0] [15:8] [8:0])];
$assign_val = [qw(a[3] a[12])];
ub skew (@&)
{
# When the next argument is a function, we have recursively setup
# all the rest of the refs.
return $_[0]->() if ref $_[0] eq "CODE";
my $oldval = $_[0];
foreach (ref $_[0] eq "ARRAY" ? @{$_[0]} : $_[0])
{
$_[0] = $_; # Setup the new value.
skew(@_[1..$#_]);
}
$_[0] = $oldval;
}
$monitor = "\$monitor";
$stime = "\$stime";
$t = 0;
skew $port_list, $port_decl, $wire_decl, $assign_val, sub {
$t++; :>
module test$t (a$port_list);
output $port_decl a;
wire $wire_decl a;
assign $assign_val = 1'b1;
initial $monitor($stime,,a);
endmodule
<:}; :>
module top;
wire [7:0] a;
<:foreach (1..$t) { _:>
test$_ t$_(a);
<:}_:>
endmodule
-------------------------------------------------------------------
Here's the answers for XL
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 556: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 558: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 568: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 570: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 580: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 582: a
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 183: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 183: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 193: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 193: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 223: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 233: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 243: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 243: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 253: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 253: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 283: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 293: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 303: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 303: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 313: a[15:8]
Error! LS index in part-select on expanded vector net
is out of range [Verilog-LSEVR]
"/tmp/t.v", 313: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 343: a[15:8]
Error! MS index in part-select on expanded vector net
is out of range [Verilog-MSEVR]
"/tmp/t.v", 353: a[15:8]
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 620: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 622: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 624: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 626: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 628: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 630: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 632: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 634: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 636: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 638: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 640: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 642: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 644: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 646: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 648: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 650: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 652: a
Warning! Port sizes differ in port connection (port 0) [Verilog-PCDPC]
"/tmp/t.v", 654: a
18 errors 24 warnings
-------------------------------------------------------------------
Here's the answers for VCS
Error: Constant bit select out of range (/tmp/t.v line 16)
Error: Inconsistent declaration for a (/tmp/t.v line 24)
Error: Constant bit select out of range (/tmp/t.v line 26)
Error: Inconsistent declaration for a (/tmp/t.v line 34)
Error: Constant bit select out of range (/tmp/t.v line 56)
Error: Inconsistent declaration for a (/tmp/t.v line 64)
Error: Inconsistent declaration for a (/tmp/t.v line 74)
Error: Constant bit select out of range (/tmp/t.v line 76)
Error: Constant bit select out of range (/tmp/t.v line 86)
Error: Inconsistent declaration for a (/tmp/t.v line 104)
Error: Inconsistent declaration for a (/tmp/t.v line 114)
Error: Constant bit select out of range (/tmp/t.v line 116)
Error: Inconsistent declaration for a (/tmp/t.v line 124)
Error: Inconsistent declaration for a (/tmp/t.v line 134)
Error: Constant bit select out of range (/tmp/t.v line 136)
Error: Inconsistent declaration for a (/tmp/t.v line 144)
Error: Constant bit select out of range (/tmp/t.v line 146)
Error: Inconsistent declaration for a (/tmp/t.v line 154)
Error: Constant bit select out of range (/tmp/t.v line 176)
Error: Part select out of range (/tmp/t.v line 183)
Error: Part select out of range (/tmp/t.v line 193)
Error: Constant bit select out of range (/tmp/t.v line 196)
Error: Inconsistent declaration for a (/tmp/t.v line 204)
Error: Constant bit select out of range (/tmp/t.v line 206)
Error: Inconsistent declaration for a (/tmp/t.v line 214)
Error: Part select out of range (/tmp/t.v line 223)
Error: Part select out of range (/tmp/t.v line 233)
Error: Constant bit select out of range (/tmp/t.v line 236)
Error: Part select out of range (/tmp/t.v line 243)
Error: Inconsistent declaration for a (/tmp/t.v line 244)
Error: Part select out of range (/tmp/t.v line 253)
Error: Inconsistent declaration for a (/tmp/t.v line 254)
Error: Constant bit select out of range (/tmp/t.v line 256)
Error: Constant bit select out of range (/tmp/t.v line 266)
Error: Part select out of range (/tmp/t.v line 283)
Error: Inconsistent declaration for a (/tmp/t.v line 284)
Error: Part select out of range (/tmp/t.v line 293)
Error: Inconsistent declaration for a (/tmp/t.v line 294)
Error: Constant bit select out of range (/tmp/t.v line 296)
Error: Part select out of range (/tmp/t.v line 303)
Error: Inconsistent declaration for a (/tmp/t.v line 304)
Error: Part select out of range (/tmp/t.v line 313)
Error: Inconsistent declaration for a (/tmp/t.v line 314)
Error: Constant bit select out of range (/tmp/t.v line 316)
Error: Inconsistent declaration for a (/tmp/t.v line 324)
Error: Constant bit select out of range (/tmp/t.v line 326)
Error: Inconsistent declaration for a (/tmp/t.v line 334)
Error: Part select out of range (/tmp/t.v line 343)
Error: Part select out of range (/tmp/t.v line 353)
Error: Constant bit select out of range (/tmp/t.v line 356)
Error: Part select out of range (/tmp/t.v line 363)
Error: Part select out of range (/tmp/t.v line 373)
Error: Constant bit select out of range (/tmp/t.v line 376)
Error: Part select out of range (/tmp/t.v line 383)
Error: Inconsistent declaration for a (/tmp/t.v line 384)
Error: Constant bit select out of range (/tmp/t.v line 386)
Error: Part select out of range (/tmp/t.v line 393)
Error: Inconsistent declaration for a (/tmp/t.v line 394)
Error: Constant bit select out of range (/tmp/t.v line 416)
Error: Part select out of range (/tmp/t.v line 423)
Error: Inconsistent declaration for a (/tmp/t.v line 424)
Error: Part select out of range (/tmp/t.v line 433)
Error: Inconsistent declaration for a (/tmp/t.v line 434)
Error: Constant bit select out of range (/tmp/t.v line 436)
Error: Part select out of range (/tmp/t.v line 443)
Error: Constant bit select out of range (/tmp/t.v line 446)
Error: Part select out of range (/tmp/t.v line 453)
Error: Inconsistent declaration for a (/tmp/t.v line 464)
Error: Inconsistent declaration for a (/tmp/t.v line 474)
Error: Constant bit select out of range (/tmp/t.v line 476)
Error: Part select out of range (/tmp/t.v line 483)
Error: Inconsistent declaration for a (/tmp/t.v line 484)
Error: Part select out of range (/tmp/t.v line 493)
Error: Inconsistent declaration for a (/tmp/t.v line 494)
Error: Constant bit select out of range (/tmp/t.v line 496)
Error: Part select out of range (/tmp/t.v line 503)
Error: Inconsistent declaration for a (/tmp/t.v line 504)
Error: Constant bit select out of range (/tmp/t.v line 506)
51 of 55 modules done
Error: Part select out of range (/tmp/t.v line 513)
Error: Inconsistent declaration for a (/tmp/t.v line 514)
Error: Constant bit select out of range (/tmp/t.v line 536)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 556)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 558)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 568)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 570)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 580)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 582)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 620)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 622)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 624)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 626)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 628)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 630)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 632)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 634)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 636)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 638)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 640)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 642)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 644)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 646)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 648)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 650)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 652)
Warning: port size mis-match on output port a (port number 0) (/tmp/t.v line 654)
55 of 55 modules done
Errors: 81
-------------------------------------------------------------------
Here's the long source....
<p>module test1 (a);
output [7:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test2 (a);
output [7:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test3 (a);
output [7:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test4 (a);
output [7:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test5 (a);
output [7:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test6 (a);
output [7:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test7 (a);
output [15:8] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test8 (a);
output [15:8] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test9 (a);
output [15:8] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test10 (a);
output [15:8] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test11 (a);
output [15:8] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test12 (a);
output [15:8] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test13 (a);
output [8:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test14 (a);
output [8:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test15 (a);
output [8:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test16 (a);
output [8:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test17 (a);
output [8:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test18 (a);
output [8:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test19 (a[15:8]);
output [7:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test20 (a[15:8]);
output [7:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test21 (a[15:8]);
output [7:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test22 (a[15:8]);
output [7:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test23 (a[15:8]);
output [7:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test24 (a[15:8]);
output [7:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test25 (a[15:8]);
output [15:8] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test26 (a[15:8]);
output [15:8] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test27 (a[15:8]);
output [15:8] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test28 (a[15:8]);
output [15:8] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test29 (a[15:8]);
output [15:8] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test30 (a[15:8]);
output [15:8] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test31 (a[15:8]);
output [8:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test32 (a[15:8]);
output [8:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test33 (a[15:8]);
output [8:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test34 (a[15:8]);
output [8:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test35 (a[15:8]);
output [8:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test36 (a[15:8]);
output [8:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test37 (a[8:0]);
output [7:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test38 (a[8:0]);
output [7:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test39 (a[8:0]);
output [7:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test40 (a[8:0]);
output [7:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test41 (a[8:0]);
output [7:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test42 (a[8:0]);
output [7:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test43 (a[8:0]);
output [15:8] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test44 (a[8:0]);
output [15:8] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test45 (a[8:0]);
output [15:8] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test46 (a[8:0]);
output [15:8] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test47 (a[8:0]);
output [15:8] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test48 (a[8:0]);
output [15:8] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test49 (a[8:0]);
output [8:0] a;
wire [7:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test50 (a[8:0]);
output [8:0] a;
wire [7:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test51 (a[8:0]);
output [8:0] a;
wire [15:8] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test52 (a[8:0]);
output [8:0] a;
wire [15:8] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test53 (a[8:0]);
output [8:0] a;
wire [8:0] a;
assign a[3] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p>module test54 (a[8:0]);
output [8:0] a;
wire [8:0] a;
assign a[12] = 1'b1;
initial $monitor($stime,,a);
endmodule
<p><p>module top;
wire [7:0] a;
test1 t1(a);
test2 t2(a);
test3 t3(a);
test4 t4(a);
test5 t5(a);
test6 t6(a);
test7 t7(a);
test8 t8(a);
test9 t9(a);
test10 t10(a);
test11 t11(a);
test12 t12(a);
test13 t13(a);
test14 t14(a);
test15 t15(a);
test16 t16(a);
test17 t17(a);
test18 t18(a);
test19 t19(a);
test20 t20(a);
test21 t21(a);
test22 t22(a);
test23 t23(a);
test24 t24(a);
test25 t25(a);
test26 t26(a);
test27 t27(a);
test28 t28(a);
test29 t29(a);
test30 t30(a);
test31 t31(a);
test32 t32(a);
test33 t33(a);
test34 t34(a);
test35 t35(a);
test36 t36(a);
test37 t37(a);
test38 t38(a);
test39 t39(a);
test40 t40(a);
test41 t41(a);
test42 t42(a);
test43 t43(a);
test44 t44(a);
test45 t45(a);
test46 t46(a);
test47 t47(a);
test48 t48(a);
test49 t49(a);
test50 t50(a);
test51 t51(a);
test52 t52(a);
test53 t53(a);
test54 t54(a);
<p>endmodule
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