Re: Proposal Two for ANSI style port declarations

From: Adam Krolnik (adamk@cyrix.com)
Date: Wed Oct 28 1998 - 21:56:03 PST


Here is a visual difference:

Proposal 2:
---------------------------

 module acc_fsm ;
    parameter DATAWIDTH=64;
    input wire CLK, RST, IT_IL_RQ, IT_RQ_VLD, RdMsg,
                                 WrMsg, AccessOK, XX_IL_PIODONE;
                                 OM_IL_GT, RespVld;
    output reg [31:0] CaptureAddress;
    output reg [DATAWIDTH-1:0] CaptureData;
    output reg IL_IT_GT, IL_XX_PIORD, IL_XX_PIOWR,
                                 IL_OM_RQ, SelectResp, SetRespVld,
                                 ClrRespVld;

    reg [2:0] LE_NxtState, LE_State;

Proposal 1:
---------------------------

 module acc_fsm( // paren vs. semi
    parameter DATAWIDTH=64, // comma vs. semi
    input wire CLK, RST, IT_IL_RQ, IT_RQ_VLD, RdMsg,
                                 WrMsg, AccessOK, XX_IL_PIODONE,
                                 OM_IL_GT, RespVld, // comma vs. semi
    output reg [31:0] CaptureAddress,
    output reg [DATAWIDTH-1:0] CaptureData,
    output reg IL_IT_GT, IL_XX_PIORD, IL_XX_PIOWR,
                                 IL_OM_RQ, SelectResp, SetRespVld, ClrRespVld // No semi.
    ); // Match the first paren.

    reg [2:0] LE_NxtState, LE_State;

<p>I vote for Proposal 2 - Get rid of the redundant parenthesis - and the list.

Perl is doing it!
Get rid of something that really is unnecessary.

<p> Adam Krolnik
    Verification Engineer
    Cyrix - NSC.
    Richardson TX. 75085



This archive was generated by hypermail 2.1.4 : Mon Jul 08 2002 - 12:53:01 PDT and
sponsored by Boyd Technology, Inc.