From: Steven Sharp (sharp@cadence.com)
Date: Tue Nov 09 1999 - 11:28:29 PST
Macros with arguments are not implemented in Verilog-XL, but they are
implemented in NC-Verilog. In NC-Verilog, the correct syntax is
`undef max
Using `undef max(a,b) produces a syntax error.
The BNF should probably be modified to match this. Generally, when you
want to use `undef, you are trying to get rid of any old definitions
without necessarily knowing anything about the definition, such as its
parameters.
This syntax correction applies to `ifdef also.
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