From: Michael McNamara (mac@verisity.com)
Date: Thu Feb 10 2000 - 17:30:58 PST
Steven Sharp writes:
> > The new generate capability adds some reserved words for use with a
> > generate block, such as 'use'. Annex B includes these in the general list
> > of reserved words.
>
> I question the addition of any reserved words unless there is a strong reason
> to believe that they will be used in the future. These must have been added
> before I joined the BTF.
>
> > I would like to propose creating a new section in annex B for "Reserved
> > words within a generate block". This is the same suggestion I made during
> > last Monday's VSG call regarding the ATF's new reserved words within
> > specify block (which were not listed anywhere). The advantage is that the
> > words could still be legal identifiers at the module or scope level, and
> > therefore less likely to impact existing Verilog code.
>
> This is a *VERY BAD IDEA*. There are reasons why modern languages have
> reserved keywords. We don't want to have to use context-sensitive lexers.
I heartily agree that context sensitive reserved words is evil.
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