Re: BTF - Numerous Draft 4 Updates - VSG to vote on Friday

From: Shalom Bresticker (shalom@msil.sps.mot.com)
Date: Wed Feb 16 2000 - 05:27:02 PST

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Steven,
<p>I like your suggestion, but it does not solve my problem.
<br>The first sentence of 17.5.3 describes the memory.
<br>I would like an additional sentence, say in 17.5.1, describing
the input_terms
<br>and output_terms arguments of the PLA tasks.
<br>Otherwise, the poor reader has to deduce their form from the examples.
<br>It's not explicitly stated.
<p>Shalom
<p>Steven Sharp wrote:
<blockquote TYPE=CITE>> &lt;p>What I&amp;nbsp;would like to add is a comment
that input_terms and
<br>output_terms
<br>> are vectors
<br>> &lt;br>whose width corresponds to the number of input bits and output
bits
<br>> of the PLA,
<br>> &lt;br>similar to the explanation of the memory dimensions in 17.5.3.
<br>> &lt;p>The change in the syntax for input_terms and output_terms from
a
<br>concatentation
<br>> of scalar
<br>> &lt;br>variables to simply "expression"&amp;nbsp;and "regl_value",
respectively,
<br>> tends to hide the fact that
<br>> &lt;br>these are vectors and not scalars.
<p>The existing comment about this is the first sentence of section 17.5.3.
It
<br>is indeed unclear now that the arguments are not concatenations of
1-bit terms.
<p>It currently says:
<p>"The logic array personality is declared as an array of regs that is
as
<br>wide as the number of input terms and as deep as the number of output
terms."
<p>I would suggest someething like:
<p>"The logic array personality is declared as an array of regs that is
as
<br>wide as the number of input term bits and as deep as the number of
output
<br>term bits."</blockquote>

<pre>--

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Shalom Bresticker email: shalom@msil.sps.mot.com
Motorola Semiconductor Israel, Ltd. Tel #: +972 9 9522268
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