From: Stuart Sutherland (stuart@sutherland-hdl.com)
Date: Thu Oct 12 2000 - 19:50:48 PDT
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Here's another good question for consideration at tomorrow's conference call.
Stu
>From: Dhiraj Raj <draj@cupertino.synopsys.com>
>Date: Tue, 10 Oct 2000 10:58:25 -0700 (PDT)
>To: stuart@sutherland-hdl.com
>Subject: Re: Verilog 2000
>X-Sun-Charset: US-ASCII
>
>
>Thanks for your prompt responses.
>
>I have one more question. Pl. pass it on to the appropriate task force if
>you don't have a definite answer. The grammar seems to allow "empty" named
>parameter assignments like...
>
>
>module mux;
>parameter WIDTH = 8;
>endmodule
>
>module chip;
>mux #(.WIDTH()) mux1();
>endmodule
>
>Is this acceptable? What is the value of WIDTH for mux1?
>
>- Dhiraj
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland Sutherland HDL Inc.
stuart@sutherland-hdl.com 22805 SW 92nd Place
phone: 503-692-0898 Tualatin, OR 97062
www.sutherland-hdl.com
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