From: Stuart Sutherland (stuart@sutherland-hdl.com)
Date: Thu Dec 14 2000 - 20:03:31 PST
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Cliff and BTF,
It looks to me like Mark has a valid point on this....
Stu
>From: Mark Warren <mwarren@cupertino.synopsys.com>
>Subject: signed compatibility question
>To: stuart@sutherland-hdl.com
>Date: Fri, 1 Dec 2000 17:01:50 -0800 (PST)
>X-Mailer: ELM [version 2.5 PL2]
>
>
>According to the new draft Verilog 2000 LRM
>all equality operators (== === != !==) are doing unsigned comparison:
>
>-> " These four operators compare operands bit for bit, with
>-> zero filling if the two operands are of unequal bit length. "
>
>all relational operators (> < >= <=) are doing unsigned comparison
>in case if nonintegral entities used as operands:
>
>-> " When two operands of unequal bit lengths are used, the smaller
>-> operand shall be zero filled on the most significant bit
>-> side to extend to the size of the larger operand."
>-> ...
>-> "When both operands of a relational expression are signed integral
>-> operands (an integer, or a unsized, unbased integer)
>-> then the expression shall be interpreted as a comparison between
>-> signed values.
>-> ...
>-> Otherwise the expression shall be interpreted as a comparison
>-> between unsigned values. "
>
>Examples:
>
>(2'sb11 == 3'sb111) yields false according to LRM
>since 2'sb11 should be zero extended before comparison,
>so "011" is not equal to "111", but they are both represent "-1" signed
>entity.
>
>(3'sb011 > 3'sb111) yields false
>since the both operands are not of "integral" type and "3 " less then "7",
>but "3" is bigger than "-1" if one is doing comparison of these signed
>entities.
>
>It looks like it is reasonable to modify rules for equality/relational
>operators:
>
>1. When two signed operands of unequal bit lengths are used, the smaller
> operand shell be sign extended.
>2. When both operands of a relational expression are signed then the
>expression
> shall be interpreted as a comparison between signed values.
>
>Please, send us clarifications and definition of the correct behavior of
>the simulator for
>comparison/equality operators for signed values.
>
>Regards
>
>========================================================
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland Sutherland HDL Inc.
stuart@sutherland-hdl.com 22805 SW 92nd Place
phone: 503-692-0898 Tualatin, OR 97062
www.sutherland-hdl.com
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