From: Michael McNamara (mac@verisity.com)
Date: Wed Mar 07 2001 - 05:32:29 PST
Precedence: bulk
<p><p>I was wondering what is our operating procedures now?
The standard has been approved; yet we are still sending in errata
that need examination and hopefully inclusion before the IEEE goes to
press with this.
Maq, what is the procedure?
Ref:
Shalom Bresticker writes:
> [1 <text/plain; us-ascii (7bit)>]
> I have a couple of minor problems with section 9.7.
> I am looking at draft 6.
>
>
> 1. Section 9.7.2 "Event control" gives the impression that @(r)
> triggers only on a change in the LSB of r (where r is a vector),
> whereas that is true only for @(posedge r) and @(negedge r). @(r)
> actually triggers on any change in r.
>
> The Cadence Verilog-XL manual is clearer on that point, although
> the syntactic meaning is different. There they show that
> event_expression ::= expression | posedge SCALAR_EVENT_EXPRESSION |
> ...
>
>
> 2. Another quibble I have is that event_expression ::=
> @event_identifier | @(event_expression) | ... in Syntax 9-8 (and
> elsewhere).
>
> The use of event_identifier here gives the misleading impression
> that the "@r" syntax (without parentheses) is only for named events
> (i.e., event_identifier is an identifier of an event), whereas
> actually any net or variable or named event can be used.
>
> 3. Finally, at the top of page 144, a few lines before Syntax 9-10,
> the following sentence is incomplete: "-- Its occurrence can be
> recognized by using the event control syntax described in".
> (should be "described in 9.7.2").
>
> Shalom
>
>
> --
> **************************************************************************
> Shalom Bresticker Shalom.Bresticker@motorola.com
> Motorola Semiconductor Israel, Ltd. Tel #: +972 9 9522268
> P.O.B. 2208, Herzlia 46120, ISRAEL Fax #: +972 9 9522890
> **************************************************************************
>
>
> [2 <text/html; us-ascii (7bit)>]
>
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