From: Peter Flake (flake@co-design.com)
Date: Wed Jul 11 2001 - 10:04:54 PDT
For your information, Co-Design's SYSTEMSIM includes a full Verilog
simulator and implements most of Verilog-2001, but not yet configurations.
Peter Flake
At 12:04 PM 7/10/01 -0500, Adam Krolnik wrote:
>Precedence: bulk
>
>
>
> > Working verilog-2001 simulator?
>
>For what features?
>
>ModelTech modelsim does implement some of the new features.
>I am told that Synopsys (design_compiler) implements some
>
>Anybody know the magic option for VCS? I have to believe that
>there is some of it implemented...
>
>Simfarm was implementing a verilog-2001 simulator but seem to
>have slowed/shut down.
>
>I am interested in seeing more configuration feature implementations.
>I have written some perl code to externally determine module
>sets from the lib.map / configuration setups. I would like to
>see more simulators/lint tools support this as it is a much better
>system than the -y/-v/<file>. Yet will still produce a few new
>simulator specific options to fully use it.
>
>
> Adam Krolnik
> Verification Mgr.
> LSI Logic Corp.
> Plano TX. 75074
This archive was generated by hypermail 2.1.4
: Mon Jul 08 2002 - 12:54:42 PDT
and
sponsored by Boyd Technology, Inc.