From: Adam Krolnik (krolnik@lsil.com)
Date: Thu Aug 16 2001 - 08:20:01 PDT
The following reply was made to PR errata/16; it has been noted by GNATS.
From: Adam Krolnik <krolnik@lsil.com>
To: btf-bugs@boyd.com
Cc: btf@boyd.com
Subject: Re: errata/16: 19.7 `line - meaning of level parameter is unclear
Date: Thu, 16 Aug 2001 10:12:08 -0500
>If, for CPP, 'linenum' and "filename" were enough, why does Verilog need >'level' as well ?
> What does it add ? Why can't it just be a comment ?
CPP had the parameter and so we deferred to their wisdom.
Today this information is a comment. People that write source to
source translators (glorified preprocessors) can now identify the
actual source of a line of code, rather than having to accept the
location of the generated file.
E.g. run cpp on some of the C include files and look at the output,
you can see what file a given line is from.
> And a preprocessor may not know, for example, whether a file is included > or not.
If they don't know, CPP doesn't include a value. We translated that
'no value' to the constant 0.
> But if the LRM says it can be a full or relative path name, that seems to >imply that it has real meaning.
We wrote it that way because that is conceptually what should be there.
If we simply put, "any string value can be put there..." then nobody
would know really what this is used for.
Adam
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