Re: variable initialization at declaration

From: Stuart Sutherland (stuart@sutherland-hdl.com)
Date: Fri Aug 17 2001 - 12:00:11 PDT

Adam,

You are correct--I think. I chased the wrong tree through the BNF. In
Annex A, I spotted "real_declaration", "reg_declaration", etc. in A.2.1.3,
and couldn't find any reference on that branch that allowed
initializations. Now that I look again, I see that those "declarations"
are for the combined port/type declarations. Section A.2.2.1 defines the
declarations for within a module, and shows:

real_type ::=
           real_identifier [ = constant_expression ]
         | real_identifier dimension { dimension }
variable_type ::=
           variable_identifier [ = constant_expression ]
         | variable_identifier dimension { dimension }

Now I still can't find anywhere that ties "variable_type" to reg | integer
| time, and "real_type" to real | realtime.

It's got to be there, I just get tired of flipping back and forth in the BNF.

Does anyone out there have an up-to-date hyper-linked version?

And any rate, I'll pass the BNF reference back to Synopsys, and encourage
them to implement full variable initialization functionality.

Stu

At 11:29 AM 8/17/2001, Adam Krolnik wrote:

<p><p>>Good afternoon;
>
>
>Very strange; I do not have draft6 [where could I get it?] but I do
>have draft 5 and in there I see in section 3.9 there is a syntax
>box (Syntax 3-3) that shows that reals can be initialized with the
> declaration. E.g.
>
>
>real my_value = 3.1415,
> pi = 3.141592;
>
>
>Stuart, I hope that we can encourage the VCS folks to not surprise the
>users on this one.
>
>
> Adam Krolnik
> Verification Mgr.
> LSI Logic Corp.
> Plano TX. 75074

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