From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Fri Oct 05 2001 - 11:20:28 PDT
Precedence: bulk
Dear Verilog Standards Group Members -
Please review the following proposal and vote YES or NO by Tuesday, October
9th.
Eligible voters and their respective votes are listed at the end of this
e-mail message.
The following paragraph has been proposed to be added to section 3.5 of the
IEEE1364-2001 to clarify an issue that has already caused severe confusion
about an enhancement that was added to the IEEE1364-2001 Standard, even
before the Standard has been officially published. We are now trying to
clarify the issue before the Standard goes to print.
Stu Sutherland has submitted a "friendly amendment" to the section 3.5
proposal. I believe Stu's wording is more accurate and takes into account
the `default_nettype compiler directive, so I have modified the wording for
this proposal as follows:
-----
MODIFIED PROPOSAL: Add the following indented paragraph to the end of
section 3.5. Indenting to match the indenting of the two last paragraphs
already in section 3.5:
"If an identifier appears on the left-hand side of a continuous assignment
statement, and that identifier has not been declared previously, an
implicit scalar net declaration of the default net type is assumed."
-----
Please note: a "NO" vote does not remove this enhancement from the
IEEE1364-2001 Standard, it merely keeps the above paragraph of
clarification from being added to the Standard. The enhancement will still
be part of the Standard, but will remain poorly documented and confusing.
If you have already previously voted on the former wording of this
proposal, and if your vote does not change due to the changed wording to
this proposal, you do not have to submit a new vote (your vote will be
counted the same as before). If you have not already voted, please vote YES
or NO on the above proposed addition to the end of section 3.5 and e-mail
your vote to me no later than Tuesday, October 9th, 2001.
Approval will be by simple majority of all IEEE VSG members that elect to
cast a vote.
Regards - Cliff Cummings
Behavioral Task Force Chairperson
VOTES - IEEE VSG (per names listed in the front of the IEEE1364-2001 Standard)
Adam Krolnik - YES
Alec G. Stanculescu - ??
Anders Nordstrom - ??
Andrew T. Lynch - ??
Charles Dawson - ??
Chris Spear - YES
Clifford E. Cummings - YES
David Roberts - ??
Deborah J. Dalio - ??
Girish S. Rao - ??
Hiroaki Nishi - ??
James A. Markevitch - ??
Karen Pieper - YES
Kasumi Hamaguchi - ??
Kurt Baty - ??
Leigh Brady - ??
Lukasz Senator - ??
Lynn A. Horobin - ??
Makoto Makino - ??
Maqsoodul (Maq) Mannan - ??
Marek Ryniejski - ??
Michael McNamara - ??
Naveen Gupta - ??
Paul Colwill - ??
Prabhakaran Krishnamurthy - ??
Shalom Bresticker - ??
Stefen Boyd - YES
Steve Meyer - ??
Steve Wadsworth - ??
Steven Sharp - ??
Stu Sutherland - YES
Stuart Sutherland - ??
Takashima Mitsuya - ??
Tatsuro Nakamura - ??
Ted Elkind - ??
Tom Dewey - ??
Tom Fitzpatrick - ??
Tsutomu Someya - ??
Yasuaki Hatta - ??
Yatin Trivedi - ??
Yokozeki Atsushi - ??
VOTES - BY OTHER INTERESTED PARTIES (Do not count towards the official vote)
Don Mills - YES
Paul Graham - NO
(I believe Paul's objection is not related to the wording of the proposal,
but that implicit scalar wire declarations from continuous assignments are
even allowed. This enhancement was already approved by the IEEE1364 Verilog
Standards Group. We are now just trying to clean up some confusion in the
IEEE1364-2001 Standard)
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// Sunburst Design, Inc. FAX: 503-641-8486 //
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