RE: Verilog-2001 language ready to roll ?

From: J. Bhasker (jbhasker@cadence.com)
Date: Tue Oct 23 2001 - 06:41:56 PDT


Precedence: bulk

>> I would like to
>> see the bugs fixed and somehow incorporated into the IEEE Verilog-2001
>> Standard, but I fear that it will never happen.

Cliff:

You can make it happen if you really want it to. One way is for the WG to
address and
resolve on the bug resolutions and then come up with a seperate document
that identifies
all the issues and their resolutions. IEEE will be very happy to publish
this document
as well - this document does not have to go through balloting and it is
officially
not part of the standard - only marked as "Working Group Recommendations".

- bhasker

--

J. Bhasker Cadence Design Systems 7535 Windsor Drive, Suite A200, Allentown, PA 18195 (610) 398-6312, (610) 530-7985(fax), jbhasker@cadence.com

<p>-----Original Message----- From: owner-1364@accellera.org [mailto:owner-1364@accellera.org]On Behalf Of Clifford E. Cummings Sent: Monday, October 22, 2001 6:45 PM To: 1364@accellera.org; btf@boyd.com Cc: 1364@accellera.org; btf@boyd.com Subject: Re: Verilog-2001 language ready to roll ?

<p>Rumor Mill Follows -

Last I heard, the IEEE was making the PDF version of "Draft 7" available for sale and would be making the print version available in January, not later this month.

I am hoping (perhaps in vain) that the January version will have most of our fix-list incorporated, but I am not betting money on this.

I think the rational is to make the pre-Standard (not labeled as a draft copy) available for people to start working with it ASAP, and to also start making $$$ for the IEEE.

It is somewhat discouraging that IEEE Standards seem to be such static documents. Whenever I send typos to authors of Verilog books, they typos are corrected in the next printing of the same edition of the book. It would be nice if the IEEE would do the same, but I think I am wishing for too much.

Part of the problem that we have with IEEE Standards is that we turn all document source files over to the IEEE and then delete the files form our computers to satisfy IEEE requirements. When we started work in 1996 on the next Verilog Standard, we requested a copy of the files from the IEEE to start the work. As I recall, the IEEE had lost the files and OVI had to cough up money to pay someone to recapture the 1995 Standard, then the committee divided up the newly-capture document among committee members who were asked to proof read the document and compare it against the existing 1995 printed Standard. Then we finally started to work on enhancements and updates.

The IEEE has a very rigorous process for creating a Standard but they seem to be sorely lacking in the archival and typo-fixing process.

I am quite concerned that the gnats system set up on Stefen Boyd's web site might never amount to anything more than a great archive and discussion of typos and clarifications by very concientious reviewers. I would like to see the bugs fixed and somehow incorporated into the IEEE Verilog-2001 Standard, but I fear that it will never happen. I spent the better part of a week reviewing gnats entries and submitting them to Maq and Yatin, but I fear that the IEEE will ignore the hard work we are doing to fix the standard and just collect their money for a new document that at least is better than the 1995 Standard.

Regards - Cliff

<p><p>At 05:38 PM 10/21/01 +0200, Shalom Bresticker wrote: >As you can see, the IEEE has officially released 1364-2001. >While the print version is not yet available, an online PDF version is >already available. >I've downloaded it, and it contains NONE of the corrections we requested, >including those we classified as critical. >Since they messed up the formatting of the bulleted lists as well, it even >looks pretty bad. > >Shalom

//*****************************************************************// // Cliff Cummings Phone: 503-641-8446 // // Sunburst Design, Inc. FAX: 503-641-8486 // // 14314 SW Allen Blvd. E-mail: cliffc@sunburst-design.com // // PMB 501 Web: www.sunburst-design.com // // Beaverton, OR 97005 // // // // Expert Verilog, Synthesis and Verification Training // //*****************************************************************//



This archive was generated by hypermail 2.1.4 : Mon Jul 08 2002 - 12:54:47 PDT and
sponsored by Boyd Technology, Inc.