From: Paul Graham (pgraham@cadence.com)
Date: Fri Dec 14 2001 - 12:48:18 PST
Precedence: bulk
> Though, for some reason, `include is documented as being different. Why?
>
> IEEE 1364-2001, Section 19.5, page 357, middle of page says:
>
> "Only whitespace or a comment may appear on the same line as the `include
> compiler directive."
Well, remember that the LRM is basically the user documentation for
Verilog-XL. If that's how Verilog-XL implemented include directives,
then that's how it got documented!
Paul
This archive was generated by hypermail 2.1.4
: Mon Jul 08 2002 - 12:54:48 PDT
and
sponsored by Boyd Technology, Inc.