From: Paul Graham (pgraham@cadence.com)
Date: Fri Feb 01 2002 - 13:14:32 PST
Precedence: bulk
> I am also interested in the case where an array
> is substituted for the vector:
>
> reg [31:0] ram[0:1023];
>
> always @(*)
> out = ram[5];
>
> Should the above be considered equivalent to:
>
> always @(ram)
> out = ram[5];
>
> or
>
> always @(ram[5])
> out = ram[5];
It can't be equivalent to 'always @(ram)' because that is illegal. A
memory must always be indexed.
I don't want to have a situation where @* can mean something which cannot be
specified by other means. That would be a hole in the language.
In VHDL, a process's sensitivity list is computed roughly by taking all the
signal names referenced in the process, then stripping off non-constant
suffixes. So if X(3) is read in the process, then X(3) appears in the
sensitivity list, but if X(i) is read, then X itself appears in the
sensitivity list.
Of course, @(...) is not the same as a vhdl sensitivity list. For one
thing, a VHDL sensitivity list can only contain static signal names, that
is, signal specifiers which can be determined at elaboration time
(presumably for simulation efficiency reasons). The arguments to @(...) on
the other hand can be arbitrary expressions. For instance, you can have:
always @(x + y) ...
Paul
This archive was generated by hypermail 2.1.4
: Mon Jul 08 2002 - 12:55:35 PDT
and
sponsored by Boyd Technology, Inc.