From: Dennis Marsa (drm@xilinx.com)
Date: Fri Jun 28 2002 - 08:25:11 PDT
Precedence: bulk
Table 29 on page 60 in section 4.4 on Expression bit lengths
lists the logical operators (&& and ||) in the 5th row along
with the comparison operators.
The "Comments" column for this row states that the operands
of these operators are resized to max(L(i), L(j)).
Resizing the operands makes sense to me for the comparison
operators. But, should the logical operators really be
treated the same way, or should their operands actually be
self-determined?
The appended testcase attempts to determine whether the operands
of &&,||,==,> are resized or not.
Verilog-XL, NC-Verilog and MTI all print:
|| operands not resized
&& operands not resized
== operands resized
> operands resized
By my interpretation of Table 29, the testcase should print
that && and || resized their operands as well.
Was a change in the operand sizing behavior of || and && intended
in the 2001 standard, or should || and && be listed separately
from the comparison operators in table 29?
For example:
+-----------------------------+------------+--------------------------+
| Expression | Bit Length | Comments |
+-----------------------------+------------+--------------------------+
| i op j, where op is | 1 | operands are sized to |
| == != === !== < <= > >= | | max(L(i), L(j) |
+-----------------------------+------------+--------------------------+
| i op j, where op is | 1 | i, j are self-determined |
| && || | | |
+-----------------------------+------------+--------------------------+
Dennis Marsa
Xilinx, Inc.
module logicalops;
initial begin
if ((4'hf + 4'h1) || 32'h0)
$display("|| operands resized");
else
$display("|| operands not resized");
if ((4'hf + 4'h1) && 32'h1)
$display("&& operands resized");
else
$display("&& operands not resized");
if ((4'hf + 4'h1) == 32'h10)
$display("== operands resized");
else
$display("== operands not resized");
if ((4'hf + 4'h1) > 32'hf)
$display("> operands resized");
else
$display("> operands not resized");
end
endmodule
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