SV-BC Info & Conference Call Agenda

From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Mon Jul 22 2002 - 07:54:03 PDT

  • Next message: Shalom Bresticker: "Re: SV-BC Info & Conference Call Agenda"

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    Hi, All -

    I am hoping that the following conference call setup is semi-permanent
    (only the dates will change)
    - courtesy of David Smith & Synopsys:
    ------------------------
    The following information is for use in connecting to the list committee
    meetings (all times are West Coast):

    22 July 9:00am-11:00am SV-BC
    22 July 11:00am-1:00pm SV-EC

    PARTICIPANT CODE: 516134
    Toll Free Dial In Number: (877)233-7845
    International Access/Caller Paid Dial In Number: (505)766-5458
    ------------------------

    The sv-bc reflector is up and jogging - if you did not receive this email
    message from the sv-bc reflector, and if you want to be on the sv-bc
    reflector, please send an email message ASAP to:

    email to majordomo@eda.org with the subject of subscribe. In the body of
    the email you can add one or all of the following:
    subscribe sv-bc
    subscribe sv-ec
    subscribe sv-cc
    end

    I am sending this message out one last time to the IEEE BTF and
    vlog-pp@eda.org reflectors. The following names have been added to the
    SystemVerilog-BC reflector. If your name is not on this list and if you
    want to be on the SystemVerilog-BC reflector, please subscribe again.
    Hopefully I have my act together better now and will get you subscribed to
    the list quickly. My apologies for losing any requests to join the list.

    bdeadman@sdvinc.com
    cliffc@eda.org
    cliffc@sunburst-design.com
    davek@co-design.com
    david.smith@synopsys.com
    dennis_brophy@mentor.com
    dkc@galaxy.nsc.com
    drm@xilinx.com
    erichm@cadence.com
    fitz@co-design.com
    flake@co-design.com
    fm@cadence.com
    gerousis@eda.org
    grouts@earthlink.net
    heath@trailnet.com
    hoshino@applistar.com
    jason@axiscorp.com
    Jayant.Nagda@synopsys.com
    Karen.Bartleson@synopsys.com
    Karen.Pieper@synopsys.com
    kchen@verplex.com
    Kevin.Cameron@nsc.com
    krolnik@lsil.com
    mac@verisity.com
    matt@siliconlogic.com
    Mehdi.Mohtashemi@synopsys.com
    mench@mench.com
    pgraham@cadence.com
    rkumar@interraeda.com
    Shalom.Bresticker@motorola.com
    sharp@cadence.com
    stefen@boyd.com
    stuart@cadence.com
    stuart@sutherland-hdl.com
    sv-xx@grfx.com
    Vassilios.Gerousis@Infineon.Com
    Wolfgang.Ecker@infineon.com

    ------------------------

    This is my list of attendees and voting status - please submit corrections:
    (aa) Cliff Cummings (Sunburst Design) *
    (aa) David Smith (Synopsys) *
    (aa) Heath Chambers (HMC) *
    (aa) Karen Pieper (Synopsys) *(aa) Kevin
    Cameron (NSC) *
    (aa) Medi Mohtashemi (Synopsys) *
    (aa) Paul Graham (Cadence) *
    (aa) Peter Flake (Co-Design) *
    (aa) Simon Davidmann (Co-Design) *
    (aa) Stefen Boyd (Boyd Technology) *
    (aa) Steven Sharp (Cadence) *
    (a-) Rog Armoni (Intel)
    (-a) Dave Kelf (Co-Design) *
    (-a) Dennis Brophy (Model Technology) *
    (-a) Kurt Takara (Zero-In) sv-bc reflector??
    (-a) Mike McNamara (Verisity) *
    (-a) Tom Fitzpatrick (Co-Design) *

    * indicates eligible to vote on consensus issues

    Next meeting: August 5
    Other meetings: August 19 -CANCELLED- IEEE Verilog conference call that
    same morning starting at 8:30 AM - contact Mike McNamara for details.
    Others -
    16, 30 September
    14, 28 October
    11, 25 November
    9, 16 December
    6, 20 January
    3, 17 February

    ------------------------

    SV-BC Agenda:

    Approve minutes sent by Stefen Boyd
    (email: Date: Mon, 08 Jul 2002 11:58:07 -0700 / Subject: SV-BC: Minutes
    from July 8, 2002 meeting)

    Access to the SystemVerilog 3.0 Document - Does everybody have access?

    Does anybody know when the next HDL++ (or whatever it is called) meeting is
    scheduled?
    How are SV-BC proposals supposed to be presented for HDL++ group approval?
    SV-BC to write proposals and HDL++ committee to approve and Stu to incorporate?

    Amend voting rules? - Grandfather clause for SystemVerilog eligible voters??
    Current rules
    Voting structure and rules
    3/4 meetings must be attended or 75%
    Vote on technical issues will be a simple majority of all attendees
    (not limited to one per company)

    ------------------------

    SV-BC Item List

    + To be discussed at 7/22 meeting (BC5, BC7, BC8, BC11, BC17**new**)

      SV-BC1 -Deprecation - **Complete** (no new proposals)
      SV-BC2 -Time precision and timescale - AI - Peter - Discussion at 07/22
    meeting?
      SV-BC3 -Dynamic process control - Moved to SV-EC (David - has the EC
    accepted this?)
      SV-BC4 -DSM (negative timing check) - AI - Dennis Brophy and Steven Sharp
    to make proposals.
    +SV-BC5 -Data alignment and data packing issues - AI - Peter to make a
    proposal & Kevin to re-send proposal
    + From: Peter Flake <flake@co-design.com>
    + Date: Fri, 19 Jul 2002 09:54:32 +0100
    + Subject: Size of members of a packed union

      SV-BC6 -Clarify auto increment/decrement AI - Peter to make a proposal
    about areas that were gray-areas in C
      SV-BC7 -Cadence issues w/ Section 2 literals - AI - Steve Sharp to send list
    + From: Stefen Boyd <stefen@boyd.com>
    + Date: Mon, 08 Jul 2002 11:58:07 -0700
    + Subject: SV-BC: Minutes from July 8, 2002 meeting

      SV-BC8 -Cadence issues w/ Section 3 - AI - Steve Sharp to send list
    + From: Stefen Boyd <stefen@boyd.com>
    + Date: Mon, 08 Jul 2002 11:58:07 -0700
    + Subject: SV-BC: Minutes from July 8, 2002 meeting

    + From: "Tom Fitzpatrick" <fitz@co-design.com>
    + Date: Fri, 19 Jul 2002 10:52:43 -0400
    + Subject: Fitz's Action Items for 7/22 Meeting

      SV-BC9 -Section 3.1, parameterized data types - ????
      SV-BC10 -Displaying enumerated types, affect on VCD - Nobody assigned yet
      SV-BC11 -Section 4: are elements of a signed packed array signed? - AI -
    Steve Sharp (???)
    + From: Stefen Boyd <stefen@boyd.com>
    + Date: Mon, 08 Jul 2002 11:58:07 -0700
    + Subject: SV-BC: Minutes from July 8, 2002 meeting

      SV-BC12 -Constant expressions - Diff between parameters, localparams,
    constants? - AI - Paul Graham (???)
      SV-BC13 -Change BNF to simplify attributes--for 1364 committee? - Cliff
    to send to IEEE committee
      SV-BC14 -Section 9: process execution efficiency - AI - maybe Erich
    Marshner? and Kevin
      SV-BC15 -Interleaving, event scheduling - clarify? Atomic operation -
    Nobody assigned yet
      SV-BC16 -interfaces - Interface enhancements/simplifications - Nobody
    assigned yet

    *** NEW ***
    SV-BC17 -Other sections reviewed by Cadence
    + From: Stefen Boyd <stefen@boyd.com>
    + Date: Mon, 08 Jul 2002 11:58:07 -0700
    + Subject: SV-BC: Minutes from July 8, 2002 meeting

    + From: Steven Sharp <sharp@cadence.com>
    + Date: Mon, 8 Jul 2002 14:14:16 -0400 (EDT)
    + Subject: Further issues (mostly for SV-BC)

    More Complete Descriptions Follow:

    SV-BC1 -Deprecation follow on - do committee members have
    * waiting for anyone to propose additional deprecation items

    SV-BC2 -Time precision and timescale in general - cleaning up the description
    * AI-Peter - will propose new wording for the 07/22 meeting

    SV-BC3 -Dynamic process control - (Kevin) processes can be created but
    there is no mechanism to kill or suspend them
         disable questions
         Kevin, Steve
    * AI-David - Moved to the EC committee

    SV-BC4 -DSM - Deep Sub-Micron (negative timing check)
    Negative timing check descriptions need improvement - Dennis Brophy
    * AI - Dennis Brophy and Steven Sharp will talk to companies for proposals
    This is on the Basic list because it is also part of the Verilog-2001
    (shoring up language capability)
    After proposals are made, a decision will be made concerning which
    committee has responsibility.

    SV-BC5 -Data alignment and data packing issues - related to pointers C/C++
    interfacing - cast from one type to another or pass into external system
    (binary write)
         Kevin, (maybe coordinate with C-committee)
    * AI - Peter to make a proposal and then to discuss it.
    * AI - Kevin to re-send his earlier proposal

    SV-BC6 -Clarify auto increment/decrement - (Karen) do you clarify when the
    increment happens - what happens with multiple per line
         Karen
    * (per Peter) has been implemented left-to-right
    * AI - Peter to make a proposal about areas that were gray-areas in C

    SV-BC7 -Cadence issues w/ Section 2 literals
          Steve Sharp

    SV-BC8 -Cadence issues w/ Section 3
          Steve Sharp

    SV-BC9 -Section 3.1, parameterized data types - ???

    SV-BC10 -Displaying enumerated types, affect on VCD - VCD overhaul to
    include automatic variables, interfaces, structs, etc.

    SV-BC11 -Section 4: are elements of a signed packed array signed?
          Steve Sharp

    SV-BC12 -Constant expressions - Lack of clarity about difference between
    parameters, localparams, constants (latter initialized at simulation time)
         Paul Graham

    SV-BC13 -Change BNF to simplify attributes--for 1364 committee?

    SV-BC14 -Section 9: process execution efficiency - maybe Erich Marshner?
         Kevin

    SV-BC15 -Interleaving, event scheduling - clarify? Atomic operation

    SV-BC16 -interfaces - Interface enhancements/simplifications - add more
    explanation about distinction between interface and module

    ----------------------------------------------------
    Cliff Cummings - Sunburst Design, Inc.
    14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
    Phone: 503-641-8446 / FAX: 503-641-8486
    cliffc@sunburst-design.com / www.sunburst-design.com
    Expert Verilog, Synthesis and Verification Training

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