From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Oct 31 2003 - 07:51:48 PST
Hi all;
It's too bad one can't write
(* xc_rloc={"R",i,"C0.S0"}, xc_uset="SET1" *)
and get the desired behavior.
Though, it seems that SystemVerilog, with their string type, can do this.
[* Table 3-2 that describes string concatenation is not very clear on
cases like this.]
If "i" was only expected to be a single character, one can today write:
parameter astr = {"R",8'h30 + i,"C0.S0"}; // i=2 => astr=R2C0.S0
I.e.
module test;
parameter astr = {"R",8'h30 + 8'd2,"C0.S0"};
//(* astr = {"R",8'h30 + 8'd2,"C0.S0"} *)
(* astr = astr *)
reg adam;
initial $display("astr parameter is %s.\n", astr);
endmodule
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