From: Krishna Garlapati (krishna@synplicity.com)
Date: Tue Nov 04 2003 - 14:17:11 PST
I agree with you that $strcat can does both concatenation and conversion
and
can be split into 2 functions. We can start with $itos and $itoa and extend
the functionality to include $itosb, $itosh, itoso and anything else
to make it
fully specified.
But I still do think that Verilog should provide a function that
performs concatenation
and conversion instead of asking the user to write one using these. This
functionality
is too often used, and is much better if Verilog provides a solution
natively.
Using the $itos approach, $strcat can be represented as:
(* some_name = $strcat("Hello", "World", $itos(i), $itosb(15) *) //
assume i is 1
resulting in some_name = "HelloWorld14'b1111"
There are a couple of issues here though. Will the proposed $itosb write
the output
as 4'b1111 or 1111 or {7{0000}, 1111} ?? You can see that the size of
the output string
can vary greatly depending on the approach. A possible solution is to
explicitly specify in the
LRM that the size of the output string of $itos will always be the
least possible size size.
Extending these functions to variables is generally a good idea. The
sizing issues that popup can
again be addressed pretty easilt if the LRM can impose restrictions on
the maximum size of string buffers
that can be generated. (for unknown sizes only at compile time)
I found out that the backend tools are very picky if we any chars are
padded to the output string.
I think we should concatenate the resutant string without any spaces or
delimeters. If the user wants
to add leading spaces (or any delimeters) it can always be done by
adding a NULL string within the
parameters to $stract.
-- - Krishna Garlapati, Synplicity Inc. (408)215-6152
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