From: Adam Krolnik (krolnik@lsil.com)
Date: Thu Mar 18 2004 - 06:39:23 PST
Good morning all;
I agree with Erich in his encouragements and suggestions. I would strengthen his
suggestion below:
- Embedded PSL should be able to reference any Verilog identifiers visible at
the place where the PSL is embedded.
to the following
"reference any Verilog identifiers directly or through hierarchical references, ..."
The other issue not yet discussed is what the verilog simulator does with the PSL
language elements and how this is controlled. A complete solution must include
this element.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
Co-author "Assertion Based Design"
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