RE: Minutes of BTF meeting, March 22, 2004

From: Jayaram Bhasker (JBhasker@esilicon.com)
Date: Mon Mar 22 2004 - 11:32:35 PST

  • Next message: Alec Stanculescu: "Apology!"

    >> There is also some discussion of extensions that could
    >> be made to Verilog that would be helpful for synthesis.

    Can someone post the extensions discussed on vlog-synth@eda.org reflector? Thanks,

    regards,
    - bhasker

    -----Original Message-----
    From: Steven Sharp [mailto:sharp@cadence.com]
    Sent: Monday, March 22, 2004 2:29 PM
    To: btf@boyd.com
    Subject: Minutes of BTF meeting, March 22, 2004

    Minutes of BTF meeting on March 22, 2004, 10:45 AM PST.

    In attendance:
            Kurt Baty
            Cliff Cummings
            Tom Fitzpatrick
            Ronald Goodstein
            Francoise Martinolle
            Michael McNamara
            Karen Pieper
            Brad Pierce
            Steven Sharp
            Alec Stanculescu
            Stuart Sutherland

    Kurt & Brad move that we approve the minutes, nobody opposes, Cliff abstains.
    Passes.

    Kurt summarizes discussion from the datatypes task force. Does not see any
    need for action by the BTF at this time.

    Alec reports that there has been no action from the prioritization group
    to look at the enhancements that have no donations. This is mostly because
    only 3 people have volunteered to participate in this. Alec suggested that
    we need to see the results of other decisions that affect these features.
    Kurt takes an action item for the datatypes task force to identify which
    enhancement requests they are handling, so that the ones remaining can be
    more easily identified.

    Brad asks a general question about what Verilog is intended to simulate,
    and why it is defined in terms of simulation rather than synthesis semantics.
    He is aware that it was used before it could be synthesized, and wants to
    understand how it was useful. Various attendees describe their historical
    experiences with it. There is also some discussion of extensions that could
    be made to Verilog that would be helpful for synthesis.

    There is no further business, and the meeting is adjourned.

    Next BTF meeting will be April 5, 2004.

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