From: Gover, Keith (keithg@model.com)
Date: Tue Aug 17 2004 - 08:26:39 PDT
Meeting called to order 8:37 August 16th, 2004
This meeting was rescheduled from the original August 9th date because
of an overlap with the 1800 meeting occurring on the same day.
This will be the last 1364 VSG meeting. All further activities will be
scheduled through the SystemVerilog Working Group.
Web site is: http://www.verilog.com/IEEEVerilog.html
Standing agenda is at: http://www.verilog.com/IEEEVerilog-Agenda.html
Patent Policy is at: http://standards.ieee.org/board/pat/pat-slideset.ppt
Today's Attendance
|
v
0 0000000111000000000110000 \
8 7654321210987655431209876 / Month
1 1111222112222220011000112 \
6 2489236570258475703279256 / Day
0 0000000000000000000000000 \
4 4444444333333333333222222 / Year
+--- DASC member (D yes, - no)
v
A aaaaaaaaaaaaaaaaaaaaaaaaa D Michael McNamara <verisity>
aaaaaaa--aaaa------a--aa- D Tom Fitzpatrick <synopsys>
A aaaaaaa-a-aa D Keith Gover <mentor>
aaaaaaaaa-aaa-aaaa------- D Kurt Baty <wsfdb>
aaa--aaaaa--aa-a-aaaaaaa- D Stefen Boyd <boyd>
A aaaaaaaaaaaaaa-aaaaaaaaa- D Shalom Bresticker <freescale>
aaaaa--aaa-----aa-a---aaa D Clifford E. Cummings <sunburst-design>
aaaaaaaaaaaaaa-aaaaaaa-a- D Charles Dawson <cadence>
aaaa-a-aa----a D Steven Dovich <cadence>
A aaaaaa-a D Ronald Goodstein <first shot>
A aaaaaaaaaaaaaa D Francoise Martinolle <cadence>
A aaaaaaaaaaaaaaaaaaaaaa-aa D Karen Pieper <synopsys>
A aaaaaa-aaaaaaaaaaaa----aa D Brad Pierce <synopsys>
A aaaaaa--aaaaa D Alec Stanculescu <fintronic>
A -a----a---a--a D Karen Bartleson <synopsys>
-aaa-aa-aa-aaa D Dennis Brophy <mentor>
A -a - Mark Hartoog
-aaa--aaaaa-aa----------- D Drew Lynch <verisity>
A -a--------aa D Don Mills <lcdm-eng.com>
A -aaaa-aaaaa-aa-aaaaaaaaaa D James A. Markevitch <Evergreen Technology>
-a-p-------a - Dave Rich <synopsys>
A -aaaaaaaaaaaaaaaaaaaaa-aa D Steven Sharp <cadence>
A -aa-aaaaaaa-a---aaaaa-aa- D Stuart Sutherland <sutherland-hdl>
--a-a-aaaa D Richard Ho <0-in>
---a-aa-aaaa D Ennis Hawk <Jeda>
-----a------------------ - Yogesh Goel <axis, now verisity>
-------a---a--a--------- D Krishna Garlapati <synplicity>
-------aaaa-----a------- D Mehdi Mohtashemi <synopsys>
---------a D Atsushi Kasuya <Jeda>
---------a--aa-aaaaaaaaaa - Anders Nordstrom <cadence>
-----------aaa D Jay Lawrence <cadence>
-----------a D David Smith <synopsys>
-----------a - Chong Guan Tan <verisity>
-----------a-aaaaaaaaa-aa - Gordon Vreugdenhil <mentor>
---------------aaaaaaaaaa D Dennis Marsa <xilinx>
-----------------------aa - Erich Marchner <cadence>
------------------------a D Peter Flake <synopsys>
A - Geoffrey Coram <Accellera Verilog-AMS>
a attended
p proxy
- absent
1) Michael McNamara read the IEEE patent policy presentation, and refers
all to http://www.verilog.com/IEEEVerilog.html where a link to the
IEEE policy is prominent.
2) Minutes of the previous meeting:
Stuart Sutherland has officially resigned as co-chair to the PTF. Stu
re-enforced that Charles Dawson has been performing all the duties of
that position and his stepping down will not affect the committee.
Shalom Bresticker moved and Francoise Martinolle seconds approving the
minutes; None opposed; None abstain. Minutes approved unanimously.
3) Report of editor Shalom Bresticker: Working on final changes.
Specifically making changes resulting from issues 113 and 341.
Thus far there is no resolution on the printing of 2001C. IEEE should
have provided a reprint to all that purchased the standard but that has
not happened.
4) Report of other activities besides task forces. Michael McNamara
reports that NesCom has approved the change to the 1346 par as of
August 12, 2004. The effect of this change is that the 1364 project is
now a work item for the SystemVerilog Working Group (SVWG). The 1364 par
allows for fixing ambiguities within the standard and addressing
incompatibilities between the two standards. This new project is
approved until December 31, 2007.
The next 1800 meeting is scheduled for:
September 14, 2004 - Frankfurt, Germany
Cadence is hosting the October 1800 meeting in Chelmsford, MA (Boston
area). Several 1364 members plan on attending.
1800 is planning the 2nd version of the SystemVerilog standard by
DAC 2005. 1364 should plan on a release of 1364 with errata fixes
around the same time.
5) Shalom Bresticker reports on ETF passed issues:
Issue 17: Moved by Shalom Bresticker, Seconded by Steven Sharp
Opposed: none
Abstain: none
Motion passes unanimously
Issue 425: Moved by Shalom Bresticker, Seconded by Brad Pierce
+---- Vote cast
| +-- DASC MEMBER
v v
----------------------------------------------
Y D Keith Gover <mentor>
Y D Shalom Bresticker <motorola>
Y D Ronald Goodstein <first shot>
Y D Francoise Martinolle <cadence>
N D Alec Stanculescu <fintronic>
Y D Karen Bartleson <synopsys>
A D Don Mills <lcdm-eng.com>
Y D James A. Markevitch <Evergreen Technology>
Y D Steven Sharp <cadence>
N D Stuart Sutherland <sutherland-hdl>
Opposed: 2
Abstain: 1
Motion passes
Issue 602: Moved by Shalom Bresticker, Seconded by Steven Sharp
Opposed: none
Abstain: none
Motion passes unanimously
Issue 603: Moved by Shalom Bresticker, Seconded by Steven Sharp
Opposed: none
Abstain: none
Motion passes unanimously
6) Steven Sharp reports on BTF. There are currently no BTF passed issues.
The BTF is waiting on 1800 before continuing with their effort.
7) Charles Dawson unavailable for discussion of PTF. Stuart Sutherland was
not at the last meeting. Francoise Martinolle was at the meeting but
does not think there were any proposals to discuss. Stu officially
resigns as PTF co-chair.
8) No new business to discuss.
9) This is the last meeting of the 1364 Working Group. All further
discussion will be done in 1800. ETF will still hold its next meeting
on August 23, 2004.
Steven Sharp moves to adjourn meeting at 9:44.
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