From: Steven Sharp (sharp@cadence.com)
Date: Mon Nov 15 2004 - 19:38:47 PST
Minutes of BTF meeting on Nov 15, 2004, 10:45 AM PDT.
(Amended to show that Stuart Sutherland was in attendance)
In attendance:
Steven Sharp
Francoise Martinolle
Mark Hartoog
Kathy McKinley
Brad Pierce
Stuart Sutherland
Group agrees to consider IEEE patent policy read.
Meeting minutes approved unanimously.
No formal proposal has been made for the uwire net type. There was
some discussion of Mark Hartoog's mail about combining uwire with
SystemVerilog variable ports. A SystemVerilog variable port presumably
can't port collapse with a net. This means that a signal crossing
hierarchy may have sections that are variables separating sections
that are nets. This separation may isolate a net that is multiply
driven from one that is declared uwire. This prevents the desired
checking on the full hierarchy of the signal (i.e. the connections
that are meant to represent a single wire in the physical design).
The obvious solution is to produce a warning for such uncollapsed
port connections to variables, like those that the proposal already
requires for uncollapsed port connections between nets. This warning
tells the user that the uwire restrictions may not be getting fully
checked across the hierarchy. This was deemed an adequate solution.
Given that there is an adequate solution, the 1364 group need not
worry about what solution P1800 might actually adopt.
Steven brought up the enhancement for allowing certain system
functions in constant expressions (enhancement 387). This is the
most likely of the pending enhancements to be proposed, possibly
along with some new system functions (enhancement 390). Nobody
had any issues to raise with this idea.
Meeting adjourned early. Next meeting is in two weeks, Nov 29.
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