Re: IEEE 1364-2005 Encryption draft with consensus changes

From: Shalom.Bresticker@freescale.com
Date: Mon Jan 17 2005 - 20:11:01 PST

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    Verilog allows arbitrarily long lines.
    This is just a problem of the LRM.
    I'll try reducing the font size.

    I do agree that in the future it would be nice to allow multi-line directives.

    Shalom

    On Mon, 17 Jan 2005, Steven J. Dovich wrote:

    > > I have a problem with the example line
    > >
    > > `pragma protect runtime_license=(library="libsecret.so", entry="chklic", exit
    > > ="rlslic", match=42)
    > >
    > > This is a single line which is too long for the page, so it wraps around,
    > > then it looks like two lines, but that is wrong, because you can't have
    > > a two line compiler directive, except for `define, but this directive has
    > > to be one line because it is all part of a single directive and all
    > > compiler directives have to be one line as far as I remember, in contrast
    > > to regular source text.
    > >
    > > Or do I remember wrong?
    > >
    > > Suggestions?
    >
    > You remember correctly. We need to bring some of the `define definition
    > into the `pragma specification, to permit backslash continuation of lines.
    > That will allow you to render in the line length constraints of the
    > text. The capability is useful in its own right, so we won't be
    > introducing requirements for the sole purpose of avoiding layout
    > problems in the text.
    >
    > I will plan to discuss this at the Wednesday meeting.
    >
    > /sjd
    >

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    Shalom Bresticker                        Shalom.Bresticker @freescale.com
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