Issue with Generate

From: Kausik Datta (kausikd@cal.interrasystems.com)
Date: Fri Feb 25 2005 - 06:34:30 PST

  • Next message: Paul Graham: "Re: Issue with Generate"

    Hi,

    The following code is a valid verilog at par LRM.
    But no tool can support such usage.
    Can we make LRM more elaborate with details of such usage, which are not
    allowed.

    Actually combination of "defparam-generate-configuration-hierRef" may cause
    lots of such
    scenario for which LRM is totally silent.

    Thanks
    Kausik

    module top;

      defparam I1.p = 1;
      generate
        if ( I1.p == 1 )
          M2 I1();
        else
          M3 I1();
        endgenerate
    endmodule

    module M2;
      parameter p = 10;
    endmodule

    module M3;
      parameter p = 1;
    Endmodule

     


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