Re: Array of instances and configuration

From: Steven Sharp (sharp@cadence.com)
Date: Tue Mar 01 2005 - 20:08:26 PST

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    >I would interpret it as follows...

    I just tested this in NC-Verilog. It produces an error if the ports in
    different instances of an instance array have different widths. This is
    not how I would have interpreted the text, but can be argued. The rules
    do refer to "the bit length of the single-instance port", which could be
    interpreted as requiring a single consistent bit length for the port in
    all the single instances. I interpreted it less strictly.

    Steven Sharp
    sharp@cadence.com

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