Re: [sv-bc] potential command line option

From: Steven J. Dovich (dovich@cadence.com)
Date: Wed Apr 20 2005 - 07:19:10 PDT

  • Next message: Shalom.Bresticker@freescale.com: "Re: FW: New Mantis Issue #667 for V-1364"

    We do not have a formal interpretation request, so the rules on
    wording for interpretations do not apply. Regardless these
    constraints do not apply to a revision. It is up to the ballot
    group to determine whether the change would be appropriate.

    /sjd

    > Just to be fair, I should point out that IEEE rules state that where the
    > standard is ambiguous, an interpretation needs to allow the most liberal
    > interpretation. This is because the content of a standard is determined
    > by what is written there, not by what was intended to be written there,
    > and here there was not even an intent at that time.
    >
    > Shalom
    >
    >
    > > It is not clear that this would be a change to what is specified in
    > > 1364-2001. The text doesn't state where configs can appear, and the
    > > syntax boxes and BNF clearly specify that they cannot appear in Verilog
    > > source files. This proposal could be viewed as an official interpretation
    > > with a corresponding clarification in the LRM. There has been no prior
    > > request for interpretation that would conflict with this. Supporting
    > > both 1364-2001 and 1364-2005 would not require different behavior.
    >
    > --
    > Shalom.Bresticker @freescale.com Tel: +972 9 9522268
    > Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890
    > POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 5441478
    >
    > [ ]Freescale Internal Use Only [ ]Freescale Confidential Proprietary

    This archive was generated by hypermail 2.1.4 : Wed Apr 20 2005 - 07:59:41 PDT and
    sponsored by Boyd Technology, Inc.