RE: [sv-bc] Re: Config-keyword work-around - was: potential command line option

From: Brophy, Dennis (dennisb@model.com)
Date: Mon Apr 25 2005 - 23:17:52 PDT

  • Next message: Pragmatic C Software: "Re: [sv-bc] potential command line option"

    Steven,

      It's too late to re-write 1364-2001. I really think the topic of
    config was put to bed with the approval of the specification by the
    IEEE-SA Board in March 2001. My reading does not conclude the intent of
    config is in doubt. The LRM is rather explicit: "As evidenced by the
    config-endconfig syntax, the config is a design element, similar to a
    module, which exists in the Verilog namespace." This makes it clear
    that it is intended for the Verilog same stream which accepts the module
    descriptions and not intended to be separate. It is clearly contain
    within.

      You argument about A 1.1, A 1.2, etc. also does not hold water. The
    BNF references "source text" not "source text files." This lends
    further evidence that the file container notion was not part of the BNF
    as you postulate.

      For those of us who have been supporting 1364-2001 in this fashion, we
    know this has had an impact on consumer designs and libraries.
    1364-2001 consumers have learned to accommodate the evolution of
    Verilog.

      I find the argument that config is a serious issue in terms of name
    collisions to be specious. Sure, it is there. But this line of
    discussion is just a ruse. You make no mention of generate. This too
    has had design and library implications. Why is it exempt from
    discussion? That's why my cynicism rules my judgment to think that
    something else is trying to be avoided.

    -Dennis

    -----Original Message-----
    From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
    Steven Sharp
    Sent: Monday, April 25, 2005 3:53 PM
    To: btf@boyd.com; etf@boyd.com; sv-bc@eda.org; sv-ec@eda.org;
    cliffc@sunburst-design.com
    Subject: [sv-bc] Re: Config-keyword work-around - was: potential command
    line option

    >There is a reasonable workaround for the config keyword issue. Users
    >can do the following [workaround using `begin_keywords "1364-2001"
    >omitted]

    There is a problem with this proposed solution.

    The only keywords in 1364-2001 that have caused problems in customer
    designs are certain ones in configs. Those keywords don't really need
    to be reserved in Verilog source if configs are not allowed in Verilog
    source (which they technically are not). As a result, NC-Verilog (and
    possibly other tools) support a dialect of 1364-2001 that does not
    reserve those keywords. This dialect is very useful, since it can
    compile legacy Verilog-1995 without significant keyword issues, and can
    also compile legal Verilog-2001 designs.

    This means that there may be a significant amount of Verilog code by now
    that uses the config keywords as identifiers, but also uses Verilog-2001
    features. The workaround you have suggested won't work for such code.

    As I mentioned in an earlier email, a compromise might be possible that
    takes advantage of `begin_keywords. However, that compromise needs to
    take into account that in practice, those keywords didn't really need to
    be reserved until configs were allowed in Verilog source files. So it
    needs to support the intermediate dialect that doesn't reserve them.

    Steven Sharp
    sharp@cadence.com

    This archive was generated by hypermail 2.1.4 : Mon Apr 25 2005 - 22:55:09 PDT and
    sponsored by Boyd Technology, Inc.