From: Dennis Brophy (dennisb@Model.com)
Date: Wed Jan 15 2003 - 11:37:24 PST
Shalom,
It may be a pity that there are no reference simulators anymore, but if
you want to see how one simulator handles @(*) and generate, it is available
in ModelSim. :)
-Dennis
(See http://www.model.com/products/verilog_ad/verilog_2001.asp)
-----Original Message-----
Sorry to "beat a dead horse", but I find it difficult to accept the
argument that developers and users know what the correct meaning of what
is written in the LRM. We have quite a few issues in which we have not
even been able to agree among ourselves what is the correct
interpretation. We still don't know how generates are supposed to work.
Heck, we haven't even been able to agree whether spaces are allowed in
@(*) ! (Looks like a curse...)
Gone are the days in which there was a "golden reference
simulator" (Verilog-XL) which was already mature when the standard came
out. (Even then, it was only good if you had a license for it.)
Also gone are the days in which a simulator came with its own LRM.
Today it just points to IEEE 1364-2001.
-- Shalom Bresticker Shalom.Bresticker@motorola.com Design & Reuse Methodology Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478 "The devil is in the details."
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