From: chas@cadence.com
Date: Mon Mar 24 2003 - 12:29:31 PST
Precedence: bulk
>Number: 311
>Category: errata
>Originator: James J. Kulikowski <jjk@cadence.com>
>Environment:
>Description:
There is a situation which is not covered by the loads
iteration in VPI. For example:
module foo;
tri t;
ram r0 (a, write, read, !t);
...
endmodule
If we iterate on loads for "t" what should we get
for the expression that is an actual for a port of
module "r0"?
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