From: Cliffc@sunburst-design.com
Date: Mon Apr 07 2003 - 09:06:14 PDT
Precedence: bulk
6.3 Assignments of different sizes
If the width of the right-hand side (RHS) net or variable is smaller than the
width of the left-hand side (LHS) net or variable in a continuous assignment,
procedural assignment or continuous procedural assignment, the MSBs of the RHS
number, net or variable will always be truncated to match the size of the LHS
variable. Compliant Verilog simulators are not required to warn or report any
errors related to assignment size-mismatch or truncation. To simplify the
behavioral description for the remainder of section 6, "variable" will refer to
either a net or variable.
6.3.1 Assigning wider unsigned and signed numbers to variables
If a RHS unsigned number requires more bits than the LHS variable that is being assigned, the most significant bits of the RHS number will be truncated to force the RHS value to be of equal bit-width to the LHS variable. The truncated bits are lost for this assignment and the numeric value of the LHS number may not equal the pre-assignment RHS number.
Example:
reg [5:0] a;
reg signed [4:0] b;
initial begin
a = 8'hff; // After the assignment, a = 6'h3f
b = 8'hff; // After the assignment, b = 5'h1f
end
If a RHS signed number requires more bits than the LHS variable that is being assigned, the most significant bits, including the sign bit of the RHS number, will be truncated to force the RHS value to be of equal bit-width to the LHS variable. Truncating the sign bit may also change the polarity of the truncated value, the truncated bits are lost for this assignment and the numeric value of the LHS number may not equal the pre-assignment RHS number.
Example:
reg [5:0] a;
reg signed [4:0] b, c;
initial begin
a = 8'sh8f; // After the assignment, a = 6'h0f
b = 8'sh8f; // After the assignment, b = 5'h0f
c = -113; // After the assignment, c = 15
end
// 1000_1111 = (-'h71 = -113) truncates to ('h0F = 15)
6.3.2 Assigning wider variables to variables
If the RHS variable is an unsigned variable and is wider than the LHS variable that is being assigned, the most significant bits of the RHS variable will be truncated to force the RHS variable to be of equal width to the LHS variable. The truncated bits are lost for this assignment and the LHS variable value may not equal the pre-assignment RHS variable value.
Example:
reg [7:0] a;
reg signed [7:0] b;
reg signed [5:0] c, d;
initial begin
a = 8'hff;
c = a; // After the assignment, b = 6'h3f
b = -113;
d = b; // After the assignment, c = 6'h0f
end
If the RHS variable is a signed variable and is wider than the LHS variable that is being assigned, and if the LHS variable is a signed variable, the most significant bit of the larger RHS variable will become the most significant bit of the updated LHS variable and the most significant bits of the RHS variable will be truncated to force the RHS variable to be of equal width to the LHS variable. The truncated bits, including the replaced sign-bit of the RHS variable are lost for this assignment.
http://boydtechinc.com/cgi-bin/issueproposal.pl?cmd=view&pr=9
This archive was generated by hypermail 2.1.4
: Mon Apr 07 2003 - 09:06:48 PDT
and
sponsored by Boyd Technology, Inc.