errata/326: FW: [sv-ec] Handling of escaped identifiers.

From: Vassilios.Gerousis@infineon.com
Date: Fri Apr 11 2003 - 03:39:50 PDT

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    >Number: 326
    >Category: errata
    >Originator: Vassilios.Gerousis@infineon.com
    >Environment:
    >Description:

    Could someone, please take care of this.

    -----Original Message-----
    From: Raghuraman R [mailto:raghu@ti.com]
    Sent: Friday, April 11, 2003 10:59 AM
    To: sv-ec@eda.org
    Subject: [sv-ec] Handling of escaped identifiers.

    Hi,

    We are facing issues because the Verilog standard is not clear on the
    handling of escaped identifiers and the eda tool vendors are having
    different interpretations.

    Particular problem is that while the VPI call fetches the signal name
    prefixed with the escaped identifer, while dumping the VCD for example,
    the signal name is not printed with the escape character.

    I had already raised this issue and the response was that the standard
    is not clear enough. I would like to know whether there is any move to
    clarify the standard's position on the escaped identifier.

    Thanks. 

    -- 
Regds,

    Raghuraman R
ASIC
Texas Instruments (India) Ltd.
Phone : +91-80-5099113
http://www.india.ti.com/~raghu

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