Re: errata/326: FW: [sv-ec] Handling of escaped identifiers.

From: Stephen Williams (steve@icarus.com)
Date: Fri Apr 11 2003 - 08:30:02 PDT

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    The following reply was made to PR errata/326; it has been noted by GNATS.

    From: Stephen Williams <steve@icarus.com>
    To: Vassilios.Gerousis@infineon.com, raghu@ti.com
    Cc: etf-bugs@boyd.com
    Subject: Re: errata/326: FW: [sv-ec] Handling of escaped identifiers.
    Date: Fri, 11 Apr 2003 08:22:52 -0700

     Vassilios.Gerousis@infineon.com said:
    > We are facing issues because the Verilog standard is not clear on the
    > handling of escaped identifiers and the eda tool vendors are having
    > different interpretations.
     
     There is a PTF errata #307 that discusses this issue. It's still
     open, the current state of play is here:
     
       <http://www.boyd.com/1364_btf/report/full_pr/307.html>
     
     
     --
     Steve Williams "The woods are lovely, dark and deep.
     steve at icarus.com But I have promises to keep,
     steve at picturel.com and lines to code before I sleep,
     http://www.picturel.com And lines to code before I sleep."
     
     

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