Date: Fri May 30 2003 - 02:49:34 PDT
I, wearing my user hat, am asking the question.
As a user, I don't find your answer convincing.
Users want stability.
They want SystemVerilog now.
They don't find Accellera less authoritive than IEEE.
IEEE rules don't interest them.
If vendors start implementing SystemVerilog now, who is going to look at a new
1364 in 2005?
IEEE also produced 1364.1, but it does not seem to interest anyone.
I'd rather not repeat that experience.
> > I think you will have to answer the question,
> > "Why yet another language? Who needs an intra-Verilog, 1364-2005 vs.
> > SystemVerilog language war? Even if SystemVerilog is not perfect, why start
> > something separate?"
> > Frankly, I myself don't have a convincing answer to that.
> Who is asking the question?
-- Shalom Bresticker Shalom.Bresticker@motorola.com Design & Reuse Methodology Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
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