From: Jay Lawrence (lawrence@cadence.com)
Date: Thu Aug 28 2003 - 04:10:01 PDT
Precedence: bulk
The following reply was made to PR enhancement/430; it has been noted by GNATS.
From: "Jay Lawrence" <lawrence@cadence.com>
To: "Stephen Williams" <steve@icarus.com>, <etf-bugs@boyd.com>
Cc:
Subject: RE: enhancement/430: PROPOSAL - Add `pragma compiler directive
Date: Thu, 28 Aug 2003 06:59:08 -0400
The issue is not just simulation/synthesis. It is any other tool that
wants to see the "hardware" view of a model. This could be running on
an emulator, a model checking tool, an equivalence checker, and anything
else that wants to see the cycle accurate view of a device.
Attributes are not sufficient. There are cases where a single construct
is not where the information is associated. Sometimes it is just and
expression (like an initial value on a port), sometimes it is a set of
statements (not just a single statement). We have see numerous
benchmarks with this kind of usage.
Please don't misunderstand, I also think attributes should be used in
the cases where it is a specific language feature like one_hot on a
register or full_case/parallel_case on a case statement, that is why I
proposed system attributes in a separate enhancment.
Lastly, translate_on/translate_off is only one example. Any other pragma
that a user, vendor or the language may want to define could also use
this mechanism.
jay
===================================
Jay Lawrence
Senior Architect
Functional Verification
Cadence Design Systems, Inc.
(978) 262-6294
lawrence@cadence.com
===================================
> -----Original Message-----
> From: Stephen Williams [mailto:steve@icarus.com]
> Sent: Wednesday, August 27, 2003 11:50 AM
> To: etf-bugs@boyd.com
> Subject: Re: enhancement/430: PROPOSAL - Add `pragma compiler
> directive
>
>
> Precedence: bulk
>
> The following reply was made to PR enhancement/430; it has
> been noted by GNATS.
>
> From: Stephen Williams <steve@icarus.com>
> To: Steven Sharp <sharp@cadence.com>
> Cc: etf-bugs@boyd.com
> Subject: Re: enhancement/430: PROPOSAL - Add `pragma compiler
> directive
> Date: Wed, 27 Aug 2003 08:42:32 -0700
>
> Steven Sharp wrote:
> > Precedence: bulk
> >
> > Are there any existing tool sets that support both
> synthesis and simulation
> > with the same front end compiler?
>
> Icarus Verilog does both, although the synthesis is not exactly
> highly competitive. However, I use attributes to do the equivilent
> of the translate on/off pragmas proposed here. The attributes work
> fine as far as I'm concerned.
> --
> Steve Williams "The woods are lovely, dark and deep.
> steve at icarus.com But I have promises to keep,
> http://www.icarus.com and lines to code before I sleep,
> http://www.picturel.com And lines to code before I sleep."
>
>
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