From: Steven Sharp (email@example.com)
Date: Sat Aug 30 2003 - 16:20:01 PDT
The following reply was made to PR errata/454; it has been noted by GNATS.
From: Steven Sharp <firstname.lastname@example.org>
Subject: Re: errata/454: 2.3.1: 2'sb0000000_10 == 2'sb10 ?
Date: Sat, 30 Aug 2003 19:10:10 -0400 (EDT)
>In a numerical constant, if the unsigned number is larger than
>the size specified for the constant, is the unsized number
>truncated, losing the bits on the left?
Well, the size of the resulting constant definitely has to be the size
that was specified. That much is clear in the LRM. How the value of
those bits are determined in this situation is not clear. Truncation
would be consistent with all other related situations in the language.
I would expect a tool to at least provide a warning in this situation.
It would not be unreasonable to consider this to be illegal syntax and
produce an error. However, Verilog-XL just produces a warning and
truncates. The result is as you suggested.
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