RE: Statements to the Press

From: Vassilios.Gerousis@infineon.com
Date: Thu Sep 04 2003 - 23:29:16 PDT

  • Next message: Shalom.Bresticker@motorola.com: "Re: Reminder for an ETF meeting Monday 9/8/03"

    Precedence: bulk

    Hi Mac,
            Despite the advice from Karen Bartleson, you have chosen to bring
    this up again and not just to IEEE, but now you are copying Accellera board
    and also the SystemVerilog Committee. Karen has asked you to stop the war
    that you have started since DAC. The industry does not need another war.

            As a leader of an IEEE DASC Working Group you should bring groups
    together rather than dividing. You have chosen to divide IEEE and Accellera
    rather than uniting. Here are by several facts.

    1- Press release at DAC, which started by you and helped to bring the same
    EETIMES and report on the division rather than unity.
    2- A second press release now which YOU started. Please note the 1364 did
    not vote on this matter. You chose to act alone. IEEE computer society does
    not give you that privilege to decide alones on press release.
    3- Sending this material to Accellera Board and SystemVerilog committees.
    You are trying to widen this war to the Accellera Board and its committees.

            I ask you nicely, do not send such emails to SystemVerilog
    committees. If you chose to divide, I will choose to unite. A second email
    like this, and I will choose to ban you from the email reflector.

    Vassilios

    -----Original Message-----
    From: Michael McNamara [mailto:mac@verisity.com]
    Sent: Saturday, September 06, 2003 12:52 AM
    To: Brophy, Dennis
    Cc: Michael T.Y. McNamara (E-mail); 1364@accellera.org; ptf@boyd.com;
    btf@boyd.com; etf@boyd.com; accellera_bod@accellera.org; sv- cc@eda.org;
    sv-bc@eda.org; sv-ac@eda.org; accellera_bod@accellera.org; sv-cc@eda.org;
    sv-bc@eda.org; sv-ac@eda.org
    Subject: RE: Statements to the Press

    -- On Sep 4 2003 at 07:42, Brophy, Dennis sent a message:
    > To: mac@verisity.com, 1364@accellera.org, btf@boyd.com, etf@boyd.org >
    Subject: "RE: Statements to the Press (fwd)" > Mac, >
    > In light of your public comments regarding the donation period
    > ending on 25 August 2003 for 1364-2005 and the email from Cliff >
    yesterday to authenticate this date as being a VSG position, I > think you
    need to explain to the VSG your recent comments to the > press. (See:
    http://www.eedesign.com/story/OEG20030904S0017) Your > statement of fact
    was a half truth as you will note from the > message that both I and Shalom
    sent to Cliff on what the approved > VSG position is.

    I described to the IEEE the entire process, the motion which passed, and the
    desire of the group to set an early donation deadline so that we could get
    donations up front, and have time to adequately work on incorporating the
    intellectual property into the standard. The use of road maps and deadlines
    to facilitate efficient and timely development are a standard part of
    effective program management which the IEEE as well as courses on project
    management teach. (See
    http://standards.ieee.org/guides/companion/part1.html#wkg and
    http://standards.ieee.org/faqs/ProjectMgmt.ppt )

    In the interest of space, the IEEE in developing the press release
    summarized the road map into the form of their press release; while also
    linking to the actual web resources where all the detail is described.

    I also explained to Richard Goering of the EETimes when he called me the
    entire road map. Specifically I described the desire of the group to get
    donations up front and its setting of an open period at the beginning, with
    a later period where donations would have no guarantee of consideration for
    inclusion in this revision; but that the working group would use its
    collective judgment to decide on incorporation of the material, et cetera.

    As you point out, Richard chose to only quote a small fraction of my
    statements of fact. As the author of his article, that is his prerogative.
    He too has space constraints.

    As you well know, it would be irresponsible to the IEEE PAR process for the
    IEEE working group to indefinitely hold up work on the 1364 project awaiting
    a donation that you as Chair of Accellera have stated publicly a number of
    times for which there has been no date set. The working group asked for
    donations in June of 2002; we were told to wait. We waited a year, and
    asked again for donations in June of 2003; and gave potential donors two
    months to consider their position and do what they felt was right for them.
    The minutes of the August 25th BTF meeting show that this question was asked
    of you again, without any conclusion of a timetime our willingness. This
    open period for donations is well documented. Numerous donations were made
    during the open period by a number of entities. Accellera chose not to make
    a donation.

    > The lack of an approved VSG deadline and a VSG approved user
    > information collection process to consider further donations >
    afterwards runs counter the position you assert. In fact, when you >
    floated the idea of a press announcement at the last VSG meeting I > don't
    think it met with approval and you suspended discussion. Now > the
    question is, did I miss a meeting where that discussion > resumed? If not,
    then I don't think you had reached a consensus > position from which to
    speak.

    As you know, I am required by the IEEE to publicize the activities of the
    working group. I worked with the IEEE managing director and public
    relations staff to fulfill this part of my job as chair of this working
    group, resulting in this press release. IEEE Working Group meetings are
    open to all; and groups can not decide to hold closed sessions, or choose
    not to reveal significant facts like donations of intelectual property. A
    vote on such a matter would be out of order.

    Again as is well documented in the IEEE Standards Policy Guidelines, as
    chair I am also specifically responsible for setting schedules and
    organizing work in a manner that results in forward progress (see the above
    referenced web pages and power-point presentations from the IEEE).

    > Since your comments fall short of what the VSG has authorized and
    > may well not represent consensus, I suggest you to re-read your own >
    words on VSG public statements: >
    > "When the IEEE 1364 Working Group indeed expresses
    > an opinion to the Press, it will be an opinion that
    > is formulated using the consensus process that we
    > are required to use for everything else we do."
    >
    >
    > If you want others to live by those words, you should as well.

    All of my statements were of fact.

    > On a side note, the referenced site for 1364-2005 in the EE-Times
    > article is a Verisity site. The "privacy notice" there that states >
    Verisity *will* collect information from visits to that site and > the link
    to the Verisity home page is outrageous in the extreme. > Has the 1364-2005
    website become the information and data > collection site for Verisity? My
    suggestion is to move to an > independent site immediately.

    Please check the web site now.

    BTW, Verilog.com is owned by me and has been owned by me since 1995, when I
    founded Verilog Consulting Services along with John Sanguinetti and others.
    From time to time I have allowed organizations with whom I am associated the
    use of this web site, such as links to books, to product description pages,
    and company web sites. At the time the Children's Online Privacy Protection
    act of 1998 went into effect, in compliance with that act, I included
    privacy language, lifting it from the Verisity web site. I failed to
    correct the attribution from Verisity to Verilog.com. Thanks to your
    discovering this problem I have fixed it on the Verilog.com site. The IEEE
    Verilog site now also has its own privacy policy elucidated where the
    personal information is gathered, and the privacy policy there stated is
    necessarily subservient to the IEEE policy and includes links to their
    policy.

    Despite the ownership of the site, the content would be the same. I choose
    to donate use of a subsection of this site to the use of the IEEE 1364
    committee, due to a lack of funds to use other resources, as well as the
    significant traffic that already visits that site to obtain other Verilog
    resources, and in order to fulfill the mandate on me as chair to effectively
    communicate activities of the group.

    As you recall, the working group has been asking for donations to fund web
    development by Stefen Boyd, and to date have received nothing. Accellera
    budgeted $5,000 for the IEEE 1364 working group, and then reallocated this
    money to other areas. I still very much hope that in the upcoming budgeting
    cycle of Accellera we can work together to fund this effort.

    The working group must have a method to communicate with the world. Today we
    are doing this with the gracious, uncompensated contribution of time and web
    space by two members of the Working Group (Stefen Boyd and myself).

    This issue of ownership of the domain name is a red herring, and should not
    distract anyone from the fact that the ownership of the Verilog language is
    not in dispute; unequivocally it is owned by the IEEE.

    I continue to work towards a single Verilog. Verilog has been owned by the
    IEEE since 1993. The IEEE is where work on this standard must happen. I
    continue to hope, work and pray that all members of Accellera will join with
    the IEEE to make a single Verilog standard.

    I am encouraged by the words of Karen Bartleson, who says:

    > Synopsys and many other EDA companies are supportive of both
    > organizations and the processes that they have defined for
    > producing standards. We will work to ensure smooth operations
    > within and between IEEE and Accellera.

    I very much hope this means that Synopsys will join the one Verilog effort.

    You quote my words from last April, where again, it is clear to all that I
    have been, and continue to be working towards a single Verilog language.
    You have my commitment that if Accellera decides today, next week, next
    month to abandon its efforts which seemingly are leading to creation of a
    divergence, and instead join forces with the IEEE on integrating the
    incredible contributions of intellectual property obtained by the IEEE and
    by Accellera into a single language, I will use all my influence to get the
    world to rally around this. As you know I have been advocating for a
    partnership between Accellera and the IEEE for years.

    The IEEE PAR demands forward progress, and can wait no longer than a few
    months. Come join us is in making one Verilog.

    Michael McNamara, speaking as:
     Accellera Board Member
     IEEE 1364 Chair
     15 year user of the Verilog language.
     10 year supplier of tools that work with Verilog

    >
    > Regards,
    >
    > Dennis
    > VSG Member
    >
    >
    > -----Original Message-----
    > From: Shalom.Bresticker@motorola.com
    > [mailto:Shalom.Bresticker@motorola.com]
    > Sent: Saturday, April 12, 2003 1:47 PM
    > To: 1364@accellera.org
    > Subject: Statements to the Press (fwd)
    >
    >
    > Resend.
    >
    > --
    > Shalom Bresticker
    Shalom.Bresticker@motorola.com
    > Design & Reuse Methodology Tel: +972 9
    9522268
    > Motorola Semiconductor Israel, Ltd. Fax: +972 9
    9522890
    > POB 2208, Herzlia 46120, ISRAEL Cell: +972 50
    441478
    >
    > ---------- Forwarded message ----------
    > Date: Fri, 11 Apr 2003 23:10:46 -0700
    > From: Michael McNamara <mac@verisity.com>
    > To: 1364@eda.org, etf@boyd.com, ptf@boyd.com, btf@boyd.com
    > Cc: accellera_bod@accellera.org, sv-cc@eda.org, sv-bc@eda.org,
    sv-ac@eda.org > Subject: Statements to the Press >
    > Precedence: bulk
    >
    >
    > We are living in exciting & scary times. These are also fragile
    > times. In our little corner of the world a controversial area is
    > the interaction of System Verilog and IEEE 1364. Ideally we can all
    > come together and rally around a single Verilog Language. Perhaps
    > we cannot. I personally am working towards the former.
    >
    > Currently statements made to the Press by individuals may be quoted
    > as if stating the position of Accellera, of the IEEE, of the IEEE
    > 1364 Working Group, or of the individual's company.
    >
    > Of course most of us play on multiple teams, I.E., have an employer,
    > serve on (numerous) Accellera committees and on the IEEE 1364 Working
    > Group and one or more of its Task Forces; so the score card is very
    > hard for the press to follow.
    >
    > When the IEEE 1364 Working Group indeed expresses an opinion to the
    > Press, it will be an opinion that is formulated using the consensus
    > process that we are required to use for everything else we do.
    >
    > What I would like to ask members of the IEEE 1364 Working Group is
    > the following: When expressing an opinion, please state that you are
    > not speaking for the IEEE 1364 Working group, but in the opinion of
    > (yourself, your employer, whomever else you have been given license
    > to express the opinion of) you would like to state X Y & Z.
    >
    > Indeed this is how I conduct my public presence, independently of on
    > who's behalf I am speaking; and I recognize that even then, one will
    > likely still get quoted out of context.
    >
    > It would be terrible for one to lose their job because they were
    > misquoted in the Press as stating the opinion of some entity.
    >
    > --
    > Michael McNamara
    > IEEE 1364 Working Group Chairman
    > speaking for my cat

    This archive was generated by hypermail 2.1.4 : Thu Sep 04 2003 - 23:45:13 PDT and
    sponsored by Boyd Technology, Inc.