RE: errata/352: PROPOSAL - 10.2.2 implies task arguments can be left off

From: Shalom.Bresticker@motorola.com
Date: Fri Sep 05 2003 - 02:30:01 PDT

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    The following reply was made to PR errata/352; it has been noted by GNATS.

    From: Shalom.Bresticker@motorola.com
    To: Brad Pierce <Brad.Pierce@synopsys.com>
    Cc: etf-bugs@boyd.com
    Subject: RE: errata/352: PROPOSAL - 10.2.2 implies task arguments can be left
     off
    Date: Fri, 5 Sep 2003 12:24:10 +0300 (IDT)

    > I think the t() notation is a natural one for tasks of
    > no arguments. Why require a special notation for 0 args?
    > Also, t() is already supported by VCS and Design
    > Compiler.
     
     But Verilog-XL and NC-Verilog do not support it.
     That would be not an errata fix, but a functional enhancement,
     which is ok as long as you understand that that is what you are doing.
     
     Shalom
     
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     Shalom Bresticker Shalom.Bresticker@motorola.com
     Design & Reuse Methodology Tel: +972 9 9522268
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