From: Gordon Vreugdenhil (gvreugde@synopsys.com)
Date: Mon Sep 15 2003 - 16:45:08 PDT
Precedence: bulk
Steven Sharp wrote:
>
[...]
>
> I have appended a test which uses a ripple-counter-like structure, where
> the output of one sequential UDP triggers the clock of the next UDP. It
> triggers the clock, schedules an NBA, waits for the NBA to complete, then
> prints the output of the chain of UDPs. The output will be 1 instead of x
> if and only if five UDP delays are still faster than one NBA delay.
VCS also produces a "1" on this example (with arbitrary long UDP chains).
> My original version used arrays of instances to allow an arbitrarily
> specified number of UDP delays. Since some simulators might still not be
> supporting those, I changed it to just use 5 hand-instantiated UDP delays
> in series.
You could use V2K generate.... :-)
module top;
parameter p = 20;
reg rclk, dclk;
wire clk = rclk;
wire q[p:0];
generate
genvar i;
u_dff ff0(q[0], 1'b1, clk);
for (i = 1; i <= p; i = i + 1) begin:chain
u_dff ff1(q[i], 1'b1, q[i-1]);
end
endgenerate
initial begin
#1 rclk = 1;
dclk <= 1;
@(dclk) $display("%b", q[p]);
end
endmodule
Gord
-- ---------------------------------------------------------------------- Gord Vreugdenhil gvreugde@synopsys.com Staff Engineer, VCS (Verification Tech. Group) (503) 547-6054 Synopsys Inc., Beaverton OR
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