From: Krishna Garlapati (krishna@synplicity.com)
Date: Tue Oct 14 2003 - 23:27:19 PDT
Shalom.Bresticker@motorola.com wrote:
>Krishna,
>
>Maybe the wording could be better, but the terms 'bit-select' and
>'part-select' refer to selection of particular bits of a vector or of
>an array element.
>
>In your case, mem[i] is not a bit-select or part-select,
>whereas mem[i][3] is a bit-select and mem[i][0+:3] is a part-select.
>
>The first two paragraphs of 4.2.1 refer to bit-selects and part-selects as
>selections of bits from "a vector net, vector reg, integer variable, or time
>variable". (Maybe something should be added about arrays as well.)
>
>And the end of 4.2.2 refers to "bit selects or part selects of array elements".
>
As Mike pointed out, If there was an element select it would address
this issue, otherwise
it needs to be addressed separately in the same section.
>
>Actually, "reg signed [3:0] mem[3:0]" is not a "signed array",
>but rather an array of signed regs. The concept of signedness of an array
>does not exist.
>
I do understand that. From the examples in my posting I assumed that one
could
deduce that I was actually talking about resultant expression types.
Thanks,
-- - Krishna Garlapati, Synplicity Inc. (408)215-6152
This archive was generated by hypermail 2.1.4
: Tue Oct 14 2003 - 23:22:41 PDT
and
sponsored by Boyd Technology, Inc.